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hrtim: fix registers, adc offsets

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This commit is contained in:
xoviat 2023-07-02 15:22:21 -05:00
parent c496da8628
commit b7f7cb95f9
2 changed files with 55 additions and 54 deletions
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45
data/registers/hrtim_v1.yaml
View File

@ -1842,37 +1842,38 @@ fieldset/TIMXRST:
len: 10 len: 10
stride: 1 stride: 1
enum: RESETEFFECT enum: RESETEFFECT
- name: TIMXCMP - name: TCMP1
description: "Timer X Compare [1, 2, 4]" description: Timer X compare 1 event
bit_offset: 19 bit_offset: 19
bit_size: 1 bit_size: 1
array: array:
len: 3 offsets:
stride: 1 - 0
- 3
- 6
- 9
enum: RESETEFFECT enum: RESETEFFECT
- name: TIMYCMP - name: TCMP2
description: "Timer Y Compare [1, 2, 4]" description: Timer X compare 2 event
bit_offset: 22 bit_offset: 20
bit_size: 1 bit_size: 1
array: array:
len: 3 offsets:
stride: 1 - 0
- 3
- 6
- 9
enum: RESETEFFECT enum: RESETEFFECT
- name: TIMZCMP - name: TCMP4
description: "Timer Compare [1, 2, 4]" description: Timer X compare 4 event
bit_offset: 25 bit_offset: 21
bit_size: 1 bit_size: 1
array: array:
len: 3 offsets:
stride: 1 - 0
enum: RESETEFFECT - 3
- name: TIMTCMP - 6
description: "Timer Compare [1, 2, 4]" - 9
bit_offset: 28
bit_size: 1
array:
len: 3
stride: 1
enum: RESETEFFECT enum: RESETEFFECT
fieldset/TIMXRSTR: fieldset/TIMXRSTR:
description: Timerx OutputX Reset Register description: Timerx OutputX Reset Register

64
data/registers/hrtim_v2.yaml
View File

@ -699,10 +699,6 @@ fieldset/HRTIM_ADC1R:
array: array:
offsets: offsets:
- 0 - 0
- 5
- 10
- 14
- 18
- name: ADCTC3 - name: ADCTC3
description: ADC trigger X on Timer Y Compare 3 description: ADC trigger X on Timer Y Compare 3
bit_offset: 11 bit_offset: 11
@ -725,6 +721,7 @@ fieldset/HRTIM_ADC1R:
- 10 - 10
- 14 - 14
- 18 - 18
- 8
- name: ADCTPER - name: ADCTPER
description: ADC trigger X on Timer Y Period description: ADC trigger X on Timer Y Period
bit_offset: 13 bit_offset: 13
@ -744,6 +741,7 @@ fieldset/HRTIM_ADC1R:
offsets: offsets:
- 0 - 0
- 5 - 5
- 14
fieldset/HRTIM_ADC2R: fieldset/HRTIM_ADC2R:
description: "High Resolution Timer: ADC Trigger 2 Register" description: "High Resolution Timer: ADC Trigger 2 Register"
fields: fields:
@ -776,17 +774,15 @@ fieldset/HRTIM_ADC2R:
- 8 - 8
- 13 - 13
- 18 - 18
- 1
- name: ADCTC3 - name: ADCTC3
description: ADC trigger X on Timer Y Compare 3 description: ADC trigger X on Timer Y Compare 3
bit_offset: 11 bit_offset: 15
bit_size: 1 bit_size: 1
array: array:
offsets: offsets:
- 14
- 0 - 0
- 4
- 8
- 13
- 18
- name: ADCTC4 - name: ADCTC4
description: ADC trigger X on Timer Y Compare 3 description: ADC trigger X on Timer Y Compare 3
bit_offset: 12 bit_offset: 12
@ -808,6 +804,7 @@ fieldset/HRTIM_ADC2R:
- 4 - 4
- 8 - 8
- 13 - 13
- 11
- name: ADCTRST - name: ADCTRST
description: ADC trigger X on Timer Y Reset description: ADC trigger X on Timer Y Reset
bit_offset: 22 bit_offset: 22
@ -1842,37 +1839,40 @@ fieldset/TIMXRST:
len: 10 len: 10
stride: 1 stride: 1
enum: RESETEFFECT enum: RESETEFFECT
- name: TIMXCMP - name: TCMP1
description: "Timer X Compare [1, 2, 4]" description: Timer X compare 1 event
bit_offset: 19 bit_offset: 0
bit_size: 1 bit_size: 1
array: array:
len: 3 offsets:
stride: 1 - 19
- 22
- 25
- 28
- 0
enum: RESETEFFECT enum: RESETEFFECT
- name: TIMYCMP - name: TCMP2
description: "Timer Y Compare [1, 2, 4]" description: Timer X compare 2 event
bit_offset: 22 bit_offset: 20
bit_size: 1 bit_size: 1
array: array:
len: 3 offsets:
stride: 1 - 0
- 3
- 6
- 9
- 11
enum: RESETEFFECT enum: RESETEFFECT
- name: TIMZCMP - name: TCMP4
description: "Timer Compare [1, 2, 4]" description: Timer X compare 4 event
bit_offset: 25 bit_offset: 21
bit_size: 1 bit_size: 1
array: array:
len: 3 offsets:
stride: 1 - 0
enum: RESETEFFECT - 3
- name: TIMTCMP - 6
description: "Timer Compare [1, 2, 4]" - 9
bit_offset: 28
bit_size: 1
array:
len: 3
stride: 1
enum: RESETEFFECT enum: RESETEFFECT
fieldset/TIMXRSTR: fieldset/TIMXRSTR:
description: Timerx OutputX Reset Register description: Timerx OutputX Reset Register