diff --git a/data/registers/hrtim_v1.yaml b/data/registers/hrtim_v1.yaml index 7b7b2b0..0bc8270 100644 --- a/data/registers/hrtim_v1.yaml +++ b/data/registers/hrtim_v1.yaml @@ -1842,37 +1842,38 @@ fieldset/TIMXRST: len: 10 stride: 1 enum: RESETEFFECT - - name: TIMXCMP - description: "Timer X Compare [1, 2, 4]" + - name: TCMP1 + description: Timer X compare 1 event bit_offset: 19 bit_size: 1 array: - len: 3 - stride: 1 + offsets: + - 0 + - 3 + - 6 + - 9 enum: RESETEFFECT - - name: TIMYCMP - description: "Timer Y Compare [1, 2, 4]" - bit_offset: 22 + - name: TCMP2 + description: Timer X compare 2 event + bit_offset: 20 bit_size: 1 array: - len: 3 - stride: 1 + offsets: + - 0 + - 3 + - 6 + - 9 enum: RESETEFFECT - - name: TIMZCMP - description: "Timer Compare [1, 2, 4]" - bit_offset: 25 + - name: TCMP4 + description: Timer X compare 4 event + bit_offset: 21 bit_size: 1 array: - len: 3 - stride: 1 - enum: RESETEFFECT - - name: TIMTCMP - description: "Timer Compare [1, 2, 4]" - bit_offset: 28 - bit_size: 1 - array: - len: 3 - stride: 1 + offsets: + - 0 + - 3 + - 6 + - 9 enum: RESETEFFECT fieldset/TIMXRSTR: description: Timerx OutputX Reset Register diff --git a/data/registers/hrtim_v2.yaml b/data/registers/hrtim_v2.yaml index fd339e3..f7c2d93 100644 --- a/data/registers/hrtim_v2.yaml +++ b/data/registers/hrtim_v2.yaml @@ -699,10 +699,6 @@ fieldset/HRTIM_ADC1R: array: offsets: - 0 - - 5 - - 10 - - 14 - - 18 - name: ADCTC3 description: ADC trigger X on Timer Y Compare 3 bit_offset: 11 @@ -725,6 +721,7 @@ fieldset/HRTIM_ADC1R: - 10 - 14 - 18 + - 8 - name: ADCTPER description: ADC trigger X on Timer Y Period bit_offset: 13 @@ -744,6 +741,7 @@ fieldset/HRTIM_ADC1R: offsets: - 0 - 5 + - 14 fieldset/HRTIM_ADC2R: description: "High Resolution Timer: ADC Trigger 2 Register" fields: @@ -776,17 +774,15 @@ fieldset/HRTIM_ADC2R: - 8 - 13 - 18 + - 1 - name: ADCTC3 description: ADC trigger X on Timer Y Compare 3 - bit_offset: 11 + bit_offset: 15 bit_size: 1 array: offsets: + - 14 - 0 - - 4 - - 8 - - 13 - - 18 - name: ADCTC4 description: ADC trigger X on Timer Y Compare 3 bit_offset: 12 @@ -808,6 +804,7 @@ fieldset/HRTIM_ADC2R: - 4 - 8 - 13 + - 11 - name: ADCTRST description: ADC trigger X on Timer Y Reset bit_offset: 22 @@ -1842,37 +1839,40 @@ fieldset/TIMXRST: len: 10 stride: 1 enum: RESETEFFECT - - name: TIMXCMP - description: "Timer X Compare [1, 2, 4]" - bit_offset: 19 + - name: TCMP1 + description: Timer X compare 1 event + bit_offset: 0 bit_size: 1 array: - len: 3 - stride: 1 + offsets: + - 19 + - 22 + - 25 + - 28 + - 0 enum: RESETEFFECT - - name: TIMYCMP - description: "Timer Y Compare [1, 2, 4]" - bit_offset: 22 + - name: TCMP2 + description: Timer X compare 2 event + bit_offset: 20 bit_size: 1 array: - len: 3 - stride: 1 + offsets: + - 0 + - 3 + - 6 + - 9 + - 11 enum: RESETEFFECT - - name: TIMZCMP - description: "Timer Compare [1, 2, 4]" - bit_offset: 25 + - name: TCMP4 + description: Timer X compare 4 event + bit_offset: 21 bit_size: 1 array: - len: 3 - stride: 1 - enum: RESETEFFECT - - name: TIMTCMP - description: "Timer Compare [1, 2, 4]" - bit_offset: 28 - bit_size: 1 - array: - len: 3 - stride: 1 + offsets: + - 0 + - 3 + - 6 + - 9 enum: RESETEFFECT fieldset/TIMXRSTR: description: Timerx OutputX Reset Register