guangzong/stm32-data
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clocks: accept regs like xxENR1 (previously it'd only accept xxENR)

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This adds a few more `clock` entries.
This commit is contained in:
Dario Nieuwenhuis 2021-11-28 22:26:22 +01:00
parent ac50274c95
commit b4191f4d1c
1 changed files with 2 additions and 5 deletions
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7
stm32data/__main__.py
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@ -1155,11 +1155,8 @@ def parse_rcc_regs():
y = yaml.load(yaml_file)
for (key, body) in y.items():
if 'SMENR' in key: continue
if key.startswith("fieldset/A") and key.endswith("ENR"):
clock = removesuffix(key, "ENR")
clock = removeprefix(clock, "fieldset/")
clock = removesuffix(clock, "L")
clock = removesuffix(clock, "H")
if m := re.match('^fieldset/(A[PH]B\d?)ENR\d?$', key):
clock = m.group(1)
for field in body['fields']:
if field['name'].endswith('EN'):
peri = removesuffix(field['name'], 'EN')