Dario Nieuwenhuis
GitHub
commit
ac4feed6b2
463
data/registers/flash_f0.yaml
Normal file
463
data/registers/flash_f0.yaml
Normal file
@ -0,0 +1,463 @@
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---
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block/FLASH:
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description: Flash
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items:
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- name: ACR
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description: Flash access control register
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byte_offset: 0
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||||||
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fieldset: ACR
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- name: KEYR
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description: Flash key register
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||||||
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byte_offset: 4
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||||||
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access: Write
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fieldset: KEYR
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- name: OPTKEYR
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description: Flash option key register
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byte_offset: 8
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||||||
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access: Write
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||||||
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fieldset: OPTKEYR
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- name: SR
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||||||
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description: Flash status register
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byte_offset: 12
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fieldset: SR
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- name: CR
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||||||
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description: Flash control register
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byte_offset: 16
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fieldset: CR
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- name: AR
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description: Flash address register
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byte_offset: 20
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access: Write
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||||||
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fieldset: AR
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||||||
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- name: OBR
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description: Option byte register
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byte_offset: 28
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access: Read
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fieldset: OBR
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- name: WRPR
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||||||
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description: Write protection register
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byte_offset: 32
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access: Read
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||||||
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fieldset: WRPR
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fieldset/ACR:
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description: Flash access control register
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fields:
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||||||
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- name: LATENCY
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||||||
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description: LATENCY
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bit_offset: 0
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bit_size: 3
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enum: LATENCY
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- name: PRFTBE
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description: PRFTBE
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bit_offset: 4
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bit_size: 1
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enum: PRFTBE
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- name: PRFTBS
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description: PRFTBS
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bit_offset: 5
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bit_size: 1
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enum_read: PRFTBSR
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fieldset/AR:
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description: Flash address register
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fields:
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- name: FAR
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description: Flash address
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bit_offset: 0
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bit_size: 32
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fieldset/CR:
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description: Flash control register
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fields:
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- name: PG
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description: Programming
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bit_offset: 0
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bit_size: 1
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enum: PG
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- name: PER
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description: Page erase
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bit_offset: 1
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bit_size: 1
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enum: PER
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- name: MER
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description: Mass erase
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bit_offset: 2
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bit_size: 1
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enum: MER
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- name: OPTPG
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description: Option byte programming
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bit_offset: 4
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bit_size: 1
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enum: OPTPG
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- name: OPTER
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description: Option byte erase
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bit_offset: 5
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bit_size: 1
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enum: OPTER
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- name: STRT
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description: Start
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bit_offset: 6
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bit_size: 1
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enum: STRT
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- name: LOCK
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description: Lock
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bit_offset: 7
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bit_size: 1
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enum: LOCK
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- name: OPTWRE
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description: Option bytes write enable
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bit_offset: 9
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bit_size: 1
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enum: OPTWRE
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- name: ERRIE
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description: Error interrupt enable
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bit_offset: 10
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bit_size: 1
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enum: ERRIE
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- name: EOPIE
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description: End of operation interrupt enable
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bit_offset: 12
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bit_size: 1
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enum: EOPIE
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- name: FORCE_OPTLOAD
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description: Force option byte loading
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bit_offset: 13
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bit_size: 1
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enum: FORCE_OPTLOAD
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fieldset/KEYR:
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description: Flash key register
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fields:
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- name: FKEYR
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description: Flash Key
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bit_offset: 0
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bit_size: 32
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fieldset/OBR:
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description: Option byte register
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fields:
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- name: OPTERR
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description: Option byte error
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bit_offset: 0
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bit_size: 1
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enum: OPTERR
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- name: RDPRT
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description: Read protection level status
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bit_offset: 1
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bit_size: 2
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enum: RDPRT
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- name: WDG_SW
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description: WDG_SW
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bit_offset: 8
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bit_size: 1
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enum: WDG_SW
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- name: nRST_STOP
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description: nRST_STOP
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bit_offset: 9
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bit_size: 1
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enum: nRST_STOP
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- name: nRST_STDBY
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description: nRST_STDBY
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bit_offset: 10
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bit_size: 1
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enum: nRST_STDBY
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- name: nBOOT0
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description: nBOOT0
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bit_offset: 11
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bit_size: 1
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enum: nBOOT0
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- name: nBOOT1
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description: BOOT1
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bit_offset: 12
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bit_size: 1
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enum: nBOOT1
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- name: VDDA_MONITOR
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description: VDDA_MONITOR
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bit_offset: 13
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bit_size: 1
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enum: VDDA_MONITOR
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- name: RAM_PARITY_CHECK
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description: RAM_PARITY_CHECK
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bit_offset: 14
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bit_size: 1
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enum: RAM_PARITY_CHECK
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- name: BOOT_SEL
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description: BOOT_SEL
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bit_offset: 15
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bit_size: 1
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enum: BOOT_SEL
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- name: Data0
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description: Data0
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bit_offset: 16
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bit_size: 8
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- name: Data1
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description: Data1
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bit_offset: 24
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bit_size: 8
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fieldset/OPTKEYR:
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description: Flash option key register
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fields:
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- name: OPTKEYR
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description: Option byte key
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bit_offset: 0
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bit_size: 32
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fieldset/SR:
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description: Flash status register
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fields:
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- name: BSY
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description: Busy
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bit_offset: 0
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bit_size: 1
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enum_read: BSYR
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- name: PGERR
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description: Programming error
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bit_offset: 2
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bit_size: 1
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enum: PGERR
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- name: WRPRT
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description: Write protection error
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bit_offset: 4
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bit_size: 1
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enum: WRPRT
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- name: EOP
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description: End of operation
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bit_offset: 5
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bit_size: 1
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enum: EOP
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fieldset/WRPR:
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description: Write protection register
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fields:
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||||||
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- name: WRP
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description: Write protect
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bit_offset: 0
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bit_size: 32
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enum/BOOT_SEL:
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bit_size: 1
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variants:
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- name: nBOOT0
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description: BOOT0 signal is defined by nBOOT0 option bit
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value: 0
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- name: BOOT0
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description: BOOT0 signal is defined by BOOT0 pin value (legacy mode)
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value: 1
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enum/BSYR:
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bit_size: 1
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variants:
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- name: Inactive
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description: No write/erase operation is in progress
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value: 0
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- name: Active
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description: A write/erase operation is in progress
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value: 1
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enum/EOP:
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bit_size: 1
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variants:
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- name: NoEvent
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description: No EOP operation occurred
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value: 0
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- name: Event
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description: An EOP event occurred
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value: 1
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enum/EOPIE:
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bit_size: 1
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variants:
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- name: Disabled
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description: End of operation interrupt disabled
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value: 0
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- name: Enabled
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description: End of operation interrupt enabled
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value: 1
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enum/ERRIE:
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bit_size: 1
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variants:
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||||||
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- name: Disabled
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description: Error interrupt generation disabled
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value: 0
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- name: Enabled
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description: Error interrupt generation enabled
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value: 1
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enum/FORCE_OPTLOAD:
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bit_size: 1
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variants:
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- name: Inactive
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description: Force option byte loading inactive
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value: 0
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- name: Active
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description: Force option byte loading active
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value: 1
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enum/LATENCY:
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bit_size: 3
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variants:
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- name: WS0
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description: 0 wait states
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value: 0
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- name: WS1
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description: 1 wait state
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value: 1
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enum/LOCK:
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bit_size: 1
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variants:
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- name: Unlocked
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description: FLASH_CR register is unlocked
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value: 0
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- name: Locked
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description: FLASH_CR register is locked
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value: 1
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enum/MER:
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bit_size: 1
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variants:
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- name: MassErase
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description: Erase activated for all user sectors
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value: 1
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enum/OPTER:
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bit_size: 1
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variants:
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- name: OptionByteErase
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description: Erase option byte activated
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value: 1
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enum/OPTERR:
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bit_size: 1
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variants:
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- name: OptionByteError
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description: The loaded option byte and its complement do not match
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value: 1
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enum/OPTPG:
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bit_size: 1
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||||||
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variants:
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||||||
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- name: OptionByteProgramming
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description: Program option byte activated
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||||||
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value: 1
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||||||
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enum/OPTWRE:
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||||||
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bit_size: 1
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||||||
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variants:
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||||||
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- name: Disabled
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||||||
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description: Option byte write disabled
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||||||
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value: 0
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||||||
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- name: Enabled
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||||||
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description: Option byte write enabled
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||||||
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value: 1
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||||||
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enum/PER:
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bit_size: 1
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||||||
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variants:
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||||||
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- name: PageErase
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||||||
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description: Erase activated for selected page
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||||||
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value: 1
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||||||
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enum/PG:
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||||||
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bit_size: 1
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||||||
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variants:
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||||||
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- name: Program
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||||||
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description: Flash programming activated
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||||||
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value: 1
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||||||
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enum/PGERR:
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||||||
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bit_size: 1
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||||||
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variants:
|
||||||
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- name: NoError
|
||||||
|
description: No programming error occurred
|
||||||
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value: 0
|
||||||
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- name: Error
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||||||
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description: A programming error occurred
|
||||||
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value: 1
|
||||||
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enum/PRFTBE:
|
||||||
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bit_size: 1
|
||||||
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variants:
|
||||||
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- name: Disabled
|
||||||
|
description: Prefetch is disabled
|
||||||
|
value: 0
|
||||||
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- name: Enabled
|
||||||
|
description: Prefetch is enabled
|
||||||
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value: 1
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||||||
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enum/PRFTBSR:
|
||||||
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bit_size: 1
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||||||
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variants:
|
||||||
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- name: Disabled
|
||||||
|
description: Prefetch buffer is disabled
|
||||||
|
value: 0
|
||||||
|
- name: Enabled
|
||||||
|
description: Prefetch buffer is enabled
|
||||||
|
value: 1
|
||||||
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enum/RAM_PARITY_CHECK:
|
||||||
|
bit_size: 1
|
||||||
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variants:
|
||||||
|
- name: Enabled
|
||||||
|
description: RAM parity check enabled
|
||||||
|
value: 0
|
||||||
|
- name: Disabled
|
||||||
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description: RAM parity check disabled
|
||||||
|
value: 1
|
||||||
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enum/RDPRT:
|
||||||
|
bit_size: 2
|
||||||
|
variants:
|
||||||
|
- name: Level0
|
||||||
|
description: Level 0
|
||||||
|
value: 0
|
||||||
|
- name: Level1
|
||||||
|
description: Level 1
|
||||||
|
value: 1
|
||||||
|
- name: Level2
|
||||||
|
description: Level 2
|
||||||
|
value: 3
|
||||||
|
enum/STRT:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Start
|
||||||
|
description: Trigger an erase operation
|
||||||
|
value: 1
|
||||||
|
enum/VDDA_MONITOR:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Disabled
|
||||||
|
description: VDDA power supply supervisor disabled
|
||||||
|
value: 0
|
||||||
|
- name: Enabled
|
||||||
|
description: VDDA power supply supervisor enabled
|
||||||
|
value: 1
|
||||||
|
enum/WDG_SW:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Hardware
|
||||||
|
description: Hardware watchdog
|
||||||
|
value: 0
|
||||||
|
- name: Software
|
||||||
|
description: Software watchdog
|
||||||
|
value: 1
|
||||||
|
enum/WRPRT:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NoError
|
||||||
|
description: No write protection error occurred
|
||||||
|
value: 0
|
||||||
|
- name: Error
|
||||||
|
description: A write protection error occurred
|
||||||
|
value: 1
|
||||||
|
enum/nBOOT0:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Disabled
|
||||||
|
description: "When BOOT_SEL is cleared, select the device boot mode"
|
||||||
|
value: 0
|
||||||
|
- name: Enabled
|
||||||
|
description: "When BOOT_SEL is cleared, select the device boot mode"
|
||||||
|
value: 1
|
||||||
|
enum/nBOOT1:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Disabled
|
||||||
|
description: "Together with BOOT0, select the device boot mode"
|
||||||
|
value: 0
|
||||||
|
- name: Enabled
|
||||||
|
description: "Together with BOOT0, select the device boot mode"
|
||||||
|
value: 1
|
||||||
|
enum/nRST_STDBY:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Reset
|
||||||
|
description: Reset generated when entering Standby mode
|
||||||
|
value: 0
|
||||||
|
- name: NoReset
|
||||||
|
description: No reset generated
|
||||||
|
value: 1
|
||||||
|
enum/nRST_STOP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Reset
|
||||||
|
description: Reset generated when entering Stop mode
|
||||||
|
value: 0
|
||||||
|
- name: NoReset
|
||||||
|
description: No reset generated
|
||||||
|
value: 1
|
||||||
1249
data/registers/rcc_f0.yaml
Normal file
1249
data/registers/rcc_f0.yaml
Normal file
File diff suppressed because it is too large
Load Diff
1153
data/registers/rcc_f0x0.yaml
Normal file
1153
data/registers/rcc_f0x0.yaml
Normal file
File diff suppressed because it is too large
Load Diff
457
data/registers/syscfg_f0.yaml
Normal file
457
data/registers/syscfg_f0.yaml
Normal file
@ -0,0 +1,457 @@
|
|||||||
|
---
|
||||||
|
block/SYSCFG:
|
||||||
|
description: System configuration controller
|
||||||
|
items:
|
||||||
|
- name: CFGR1
|
||||||
|
description: configuration register 1
|
||||||
|
byte_offset: 0
|
||||||
|
fieldset: CFGR1
|
||||||
|
- name: EXTICR
|
||||||
|
description: external interrupt configuration register 1
|
||||||
|
array:
|
||||||
|
len: 4
|
||||||
|
stride: 4
|
||||||
|
byte_offset: 8
|
||||||
|
fieldset: EXTICR
|
||||||
|
- name: CFGR2
|
||||||
|
description: configuration register 2
|
||||||
|
byte_offset: 24
|
||||||
|
fieldset: CFGR2
|
||||||
|
fieldset/CFGR1:
|
||||||
|
description: configuration register 1
|
||||||
|
fields:
|
||||||
|
- name: MEM_MODE
|
||||||
|
description: Memory mapping selection bits
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 2
|
||||||
|
enum: MEM_MODE
|
||||||
|
- name: PA11_PA12_RMP
|
||||||
|
description: PA11 and PA12 remapping bit for small packages (28 and 20 pins)
|
||||||
|
bit_offset: 4
|
||||||
|
bit_size: 1
|
||||||
|
enum: PA11_PA12_RMP
|
||||||
|
- name: IR_MOD
|
||||||
|
description: IR Modulation Envelope signal selection
|
||||||
|
bit_offset: 6
|
||||||
|
bit_size: 2
|
||||||
|
enum: IR_MOD
|
||||||
|
- name: ADC_DMA_RMP
|
||||||
|
description: ADC DMA remapping bit
|
||||||
|
bit_offset: 8
|
||||||
|
bit_size: 1
|
||||||
|
enum: ADC_DMA_RMP
|
||||||
|
- name: USART1_TX_DMA_RMP
|
||||||
|
description: USART1_TX DMA remapping bit
|
||||||
|
bit_offset: 9
|
||||||
|
bit_size: 1
|
||||||
|
enum: USART1_TX_DMA_RMP
|
||||||
|
- name: USART1_RX_DMA_RMP
|
||||||
|
description: USART1_RX DMA request remapping bit
|
||||||
|
bit_offset: 10
|
||||||
|
bit_size: 1
|
||||||
|
enum: USART1_RX_DMA_RMP
|
||||||
|
- name: TIM16_DMA_RMP
|
||||||
|
description: TIM16 DMA request remapping bit
|
||||||
|
bit_offset: 11
|
||||||
|
bit_size: 1
|
||||||
|
enum: TIM16_DMA_RMP
|
||||||
|
- name: TIM17_DMA_RMP
|
||||||
|
description: TIM17 DMA request remapping bit
|
||||||
|
bit_offset: 12
|
||||||
|
bit_size: 1
|
||||||
|
enum: TIM17_DMA_RMP
|
||||||
|
- name: TIM16_DMA_RMP2
|
||||||
|
description: TIM16 alternate DMA request remapping bit
|
||||||
|
bit_offset: 13
|
||||||
|
bit_size: 1
|
||||||
|
enum: TIM16_DMA_RMP2
|
||||||
|
- name: TIM17_DMA_RMP2
|
||||||
|
description: TIM17 alternate DMA request remapping bit
|
||||||
|
bit_offset: 14
|
||||||
|
bit_size: 1
|
||||||
|
enum: TIM17_DMA_RMP2
|
||||||
|
- name: I2C_PB6_FMP
|
||||||
|
description: Fast Mode Plus (FM plus) driving capability activation bits.
|
||||||
|
bit_offset: 16
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C_PB6_FMP
|
||||||
|
- name: I2C_PB7_FMP
|
||||||
|
description: Fast Mode Plus (FM+) driving capability activation bits.
|
||||||
|
bit_offset: 17
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C_PB7_FMP
|
||||||
|
- name: I2C_PB8_FMP
|
||||||
|
description: Fast Mode Plus (FM+) driving capability activation bits.
|
||||||
|
bit_offset: 18
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C_PB8_FMP
|
||||||
|
- name: I2C_PB9_FMP
|
||||||
|
description: Fast Mode Plus (FM+) driving capability activation bits.
|
||||||
|
bit_offset: 19
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C_PB9_FMP
|
||||||
|
- name: I2C1_FMP
|
||||||
|
description: FM+ driving capability activation for I2C1
|
||||||
|
bit_offset: 20
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C1_FMP
|
||||||
|
- name: I2C2_FMP
|
||||||
|
description: FM+ driving capability activation for I2C2
|
||||||
|
bit_offset: 21
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C2_FMP
|
||||||
|
- name: I2C_PA9_FMP
|
||||||
|
description: Fast Mode Plus (FM+) driving capability activation bits
|
||||||
|
bit_offset: 22
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C_PA9_FMP
|
||||||
|
- name: I2C_PA10_FMP
|
||||||
|
description: Fast Mode Plus (FM+) driving capability activation bits
|
||||||
|
bit_offset: 23
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C_PA10_FMP
|
||||||
|
- name: SPI2_DMA_RMP
|
||||||
|
description: SPI2 DMA request remapping bit
|
||||||
|
bit_offset: 24
|
||||||
|
bit_size: 1
|
||||||
|
enum: SPI2_DMA_RMP
|
||||||
|
- name: USART2_DMA_RMP
|
||||||
|
description: USART2 DMA request remapping bit
|
||||||
|
bit_offset: 25
|
||||||
|
bit_size: 1
|
||||||
|
enum: USART2_DMA_RMP
|
||||||
|
- name: USART3_DMA_RMP
|
||||||
|
description: USART3 DMA request remapping bit
|
||||||
|
bit_offset: 26
|
||||||
|
bit_size: 1
|
||||||
|
enum: USART3_DMA_RMP
|
||||||
|
- name: I2C1_DMA_RMP
|
||||||
|
description: I2C1 DMA request remapping bit
|
||||||
|
bit_offset: 27
|
||||||
|
bit_size: 1
|
||||||
|
enum: I2C1_DMA_RMP
|
||||||
|
- name: TIM1_DMA_RMP
|
||||||
|
description: TIM1 DMA request remapping bit
|
||||||
|
bit_offset: 28
|
||||||
|
bit_size: 1
|
||||||
|
enum: TIM1_DMA_RMP
|
||||||
|
- name: TIM2_DMA_RMP
|
||||||
|
description: TIM2 DMA request remapping bit
|
||||||
|
bit_offset: 29
|
||||||
|
bit_size: 1
|
||||||
|
enum: TIM2_DMA_RMP
|
||||||
|
- name: TIM3_DMA_RMP
|
||||||
|
description: TIM3 DMA request remapping bit
|
||||||
|
bit_offset: 30
|
||||||
|
bit_size: 1
|
||||||
|
enum: TIM3_DMA_RMP
|
||||||
|
fieldset/CFGR2:
|
||||||
|
description: configuration register 2
|
||||||
|
fields:
|
||||||
|
- name: LOCKUP_LOCK
|
||||||
|
description: Cortex-M0 LOCKUP bit enable bit
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 1
|
||||||
|
enum: LOCKUP_LOCK
|
||||||
|
- name: SRAM_PARITY_LOCK
|
||||||
|
description: SRAM parity lock bit
|
||||||
|
bit_offset: 1
|
||||||
|
bit_size: 1
|
||||||
|
enum: SRAM_PARITY_LOCK
|
||||||
|
- name: PVD_LOCK
|
||||||
|
description: PVD lock enable bit
|
||||||
|
bit_offset: 2
|
||||||
|
bit_size: 1
|
||||||
|
enum: PVD_LOCK
|
||||||
|
- name: SRAM_PEF
|
||||||
|
description: SRAM parity flag
|
||||||
|
bit_offset: 8
|
||||||
|
bit_size: 1
|
||||||
|
enum_read: SRAM_PEFR
|
||||||
|
enum_write: SRAM_PEFW
|
||||||
|
fieldset/EXTICR:
|
||||||
|
description: external interrupt configuration register 1
|
||||||
|
fields:
|
||||||
|
- name: EXTI
|
||||||
|
description: EXTI configuration bits
|
||||||
|
bit_offset: 0
|
||||||
|
bit_size: 4
|
||||||
|
array:
|
||||||
|
len: 4
|
||||||
|
stride: 4
|
||||||
|
enum/ADC_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: ADC DMA request mapped on DMA channel 1
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: ADC DMA request mapped on DMA channel 2
|
||||||
|
value: 1
|
||||||
|
enum/I2C1_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 3 and 2 respectively
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: I2C1_RX and I2C1_TX DMA requests mapped on DMA channel 7 and 6 respectively
|
||||||
|
value: 1
|
||||||
|
enum/I2C1_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: FM+ mode is controlled by I2C_Pxx_FMP bits only
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: FM+ mode is enabled on all I2C1 pins selected through selection bits in GPIOx_AFR registers
|
||||||
|
value: 1
|
||||||
|
enum/I2C2_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: FM+ mode is controlled by I2C_Pxx_FMP bits only
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: FM+ mode is enabled on all I2C2 pins selected through selection bits in GPIOx_AFR registers
|
||||||
|
value: 1
|
||||||
|
enum/I2C_PA10_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: PA10 pin operate in standard mode
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: I2C FM+ mode enabled on PA10 and the Speed control is bypassed
|
||||||
|
value: 1
|
||||||
|
enum/I2C_PA9_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: PA9 pin operate in standard mode
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: I2C FM+ mode enabled on PA9 and the Speed control is bypassed
|
||||||
|
value: 1
|
||||||
|
enum/I2C_PB6_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: PB6 pin operate in standard mode
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: I2C FM+ mode enabled on PB6 and the Speed control is bypassed
|
||||||
|
value: 1
|
||||||
|
enum/I2C_PB7_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: PB7 pin operate in standard mode
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: I2C FM+ mode enabled on PB7 and the Speed control is bypassed
|
||||||
|
value: 1
|
||||||
|
enum/I2C_PB8_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: PB8 pin operate in standard mode
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: I2C FM+ mode enabled on PB8 and the Speed control is bypassed
|
||||||
|
value: 1
|
||||||
|
enum/I2C_PB9_FMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Standard
|
||||||
|
description: PB9 pin operate in standard mode
|
||||||
|
value: 0
|
||||||
|
- name: FMP
|
||||||
|
description: I2C FM+ mode enabled on PB9 and the Speed control is bypassed
|
||||||
|
value: 1
|
||||||
|
enum/IR_MOD:
|
||||||
|
bit_size: 2
|
||||||
|
variants:
|
||||||
|
- name: TIM16
|
||||||
|
description: TIM16 selected
|
||||||
|
value: 0
|
||||||
|
- name: USART1
|
||||||
|
description: USART1 selected
|
||||||
|
value: 1
|
||||||
|
- name: USART4
|
||||||
|
description: USART4 selected
|
||||||
|
value: 2
|
||||||
|
enum/LOCKUP_LOCK:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Disconnected
|
||||||
|
description: Cortex-M0 LOCKUP output disconnected from TIM1/15/16/17 Break input
|
||||||
|
value: 0
|
||||||
|
- name: Connected
|
||||||
|
description: Cortex-M0 LOCKUP output connected to TIM1/15/16/17 Break input
|
||||||
|
value: 1
|
||||||
|
enum/MEM_MODE:
|
||||||
|
bit_size: 2
|
||||||
|
variants:
|
||||||
|
- name: MainFlash
|
||||||
|
description: Main Flash memory mapped at 0x0000_0000
|
||||||
|
value: 0
|
||||||
|
- name: SystemFlash
|
||||||
|
description: System Flash memory mapped at 0x0000_0000
|
||||||
|
value: 1
|
||||||
|
- name: MainFlash2
|
||||||
|
description: Main Flash memory mapped at 0x0000_0000
|
||||||
|
value: 2
|
||||||
|
- name: SRAM
|
||||||
|
description: Embedded SRAM mapped at 0x0000_0000
|
||||||
|
value: 3
|
||||||
|
enum/PA11_PA12_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: Pin pair PA9/PA10 mapped on the pins
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: Pin pair PA11/PA12 mapped instead of PA9/PA10
|
||||||
|
value: 1
|
||||||
|
enum/PVD_LOCK:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Disconnected
|
||||||
|
description: PVD interrupt disconnected from TIM1/15/16/17 Break input
|
||||||
|
value: 0
|
||||||
|
- name: Connected
|
||||||
|
description: PVD interrupt connected to TIM1/15/16/17 Break input
|
||||||
|
value: 1
|
||||||
|
enum/SPI2_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 4 and 5 respectively
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: SPI2_RX and SPI2_TX DMA requests mapped on DMA channel 6 and 7 respectively
|
||||||
|
value: 1
|
||||||
|
enum/SRAM_PARITY_LOCK:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Disconnected
|
||||||
|
description: SRAM parity error disconnected from TIM1/15/16/17 Break input
|
||||||
|
value: 0
|
||||||
|
- name: Connected
|
||||||
|
description: SRAM parity error connected to TIM1/15/16/17 Break input
|
||||||
|
value: 1
|
||||||
|
enum/SRAM_PEFR:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NoParityError
|
||||||
|
description: No SRAM parity error detected
|
||||||
|
value: 0
|
||||||
|
- name: ParityErrorDetected
|
||||||
|
description: SRAM parity error detected
|
||||||
|
value: 1
|
||||||
|
enum/SRAM_PEFW:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: Clear
|
||||||
|
description: Clear SRAM parity error flag
|
||||||
|
value: 1
|
||||||
|
enum/TIM16_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 3
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 4
|
||||||
|
value: 1
|
||||||
|
enum/TIM16_DMA_RMP2:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotAlternateRemapped
|
||||||
|
description: TIM16 DMA request mapped according to TIM16_DMA_RMP bit
|
||||||
|
value: 0
|
||||||
|
- name: AlternateRemapped
|
||||||
|
description: TIM16_CH1 and TIM16_UP DMA request mapped on DMA channel 6
|
||||||
|
value: 1
|
||||||
|
enum/TIM17_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 1
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 2
|
||||||
|
value: 1
|
||||||
|
enum/TIM17_DMA_RMP2:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotAlternateRemapped
|
||||||
|
description: TIM17 DMA request mapped according to TIM16_DMA_RMP bit
|
||||||
|
value: 0
|
||||||
|
- name: AlternateRemapped
|
||||||
|
description: TIM17_CH1 and TIM17_UP DMA request mapped on DMA channel 7
|
||||||
|
value: 1
|
||||||
|
enum/TIM1_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: "TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 2, 3 and 4 respectively"
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: "TIM1_CH1, TIM1_CH2 and TIM1_CH3 DMA requests mapped on DMA channel 6"
|
||||||
|
value: 1
|
||||||
|
enum/TIM2_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 3 and 4 respectively
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: TIM2_CH2 and TIM2_CH4 DMA requests mapped on DMA channel 7
|
||||||
|
value: 1
|
||||||
|
enum/TIM3_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 4
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: TIM3_CH1 and TIM3_TRIG DMA requests mapped on DMA channel 6
|
||||||
|
value: 1
|
||||||
|
enum/USART1_RX_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: USART1_RX DMA request mapped on DMA channel 3
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: USART1_RX DMA request mapped on DMA channel 5
|
||||||
|
value: 1
|
||||||
|
enum/USART1_TX_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: USART1_TX DMA request mapped on DMA channel 2
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: USART1_TX DMA request mapped on DMA channel 4
|
||||||
|
value: 1
|
||||||
|
enum/USART2_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: USART2_RX and USART2_TX DMA requests mapped on DMA channel 5 and 4 respectively
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: USART2_RX and USART2_TX DMA requests mapped on DMA channel 6 and 7 respectively
|
||||||
|
value: 1
|
||||||
|
enum/USART3_DMA_RMP:
|
||||||
|
bit_size: 1
|
||||||
|
variants:
|
||||||
|
- name: NotRemapped
|
||||||
|
description: USART3_RX and USART3_TX DMA requests mapped on DMA channel 6 and 7 respectively (or simply disabled on STM32F0x0)
|
||||||
|
value: 0
|
||||||
|
- name: Remapped
|
||||||
|
description: USART3_RX and USART3_TX DMA requests mapped on DMA channel 3 and 2 respectively
|
||||||
|
value: 1
|
||||||
4
parse.py
4
parse.py
@ -311,6 +311,7 @@ perimap = [
|
|||||||
('.*:ADC:aditf5_v2_0', 'adc_v3/ADC'),
|
('.*:ADC:aditf5_v2_0', 'adc_v3/ADC'),
|
||||||
('.*:ADC_COMMON:aditf5_v2_0', 'adccommon_v3/ADC_COMMON'),
|
('.*:ADC_COMMON:aditf5_v2_0', 'adccommon_v3/ADC_COMMON'),
|
||||||
('.*:ADC_COMMON:aditf4_v3_0_WL', 'adccommon_v3/ADC_COMMON'),
|
('.*:ADC_COMMON:aditf4_v3_0_WL', 'adccommon_v3/ADC_COMMON'),
|
||||||
|
('STM32F0.*:SYS:.*', 'syscfg_f0/SYSCFG'),
|
||||||
('STM32F4.*:SYS:.*', 'syscfg_f4/SYSCFG'),
|
('STM32F4.*:SYS:.*', 'syscfg_f4/SYSCFG'),
|
||||||
('STM32L4.*:SYS:.*', 'syscfg_l4/SYSCFG'),
|
('STM32L4.*:SYS:.*', 'syscfg_l4/SYSCFG'),
|
||||||
('STM32L0.*:SYS:.*', 'syscfg_l0/SYSCFG'),
|
('STM32L0.*:SYS:.*', 'syscfg_l0/SYSCFG'),
|
||||||
@ -321,6 +322,8 @@ perimap = [
|
|||||||
('STM32L4.*:RCC:.*', 'rcc_l4/RCC'),
|
('STM32L4.*:RCC:.*', 'rcc_l4/RCC'),
|
||||||
('STM32F4.*:RCC:.*', 'rcc_f4/RCC'),
|
('STM32F4.*:RCC:.*', 'rcc_f4/RCC'),
|
||||||
('STM32WL.*:RCC:.*', 'rcc_wl5x/RCC'),
|
('STM32WL.*:RCC:.*', 'rcc_wl5x/RCC'),
|
||||||
|
('STM32F0.0.*:RCC:.*', 'rcc_f0x0/RCC'),
|
||||||
|
('STM32F0.*:RCC:.*', 'rcc_f0/RCC'),
|
||||||
('.*:STM32H7AB_rcc_v1_0', ''), # rcc_h7ab/RCC
|
('.*:STM32H7AB_rcc_v1_0', ''), # rcc_h7ab/RCC
|
||||||
('.*:STM32H7_rcc_v1_0', 'rcc_h7/RCC'),
|
('.*:STM32H7_rcc_v1_0', 'rcc_h7/RCC'),
|
||||||
('.*:STM32W_rcc_v1_0', 'rcc_wb55/RCC'),
|
('.*:STM32W_rcc_v1_0', 'rcc_wb55/RCC'),
|
||||||
@ -328,6 +331,7 @@ perimap = [
|
|||||||
('.*SDMMC:sdmmc2_v1_0', 'sdmmc_v2/SDMMC'),
|
('.*SDMMC:sdmmc2_v1_0', 'sdmmc_v2/SDMMC'),
|
||||||
('.*:STM32H7_pwr_v1_0', 'pwr_h7/PWR'),
|
('.*:STM32H7_pwr_v1_0', 'pwr_h7/PWR'),
|
||||||
('.*:STM32H7_flash_v1_0', 'flash_h7/FLASH'),
|
('.*:STM32H7_flash_v1_0', 'flash_h7/FLASH'),
|
||||||
|
('.*:STM32F0_flash_v1_0', 'flash_f0/FLASH'),
|
||||||
('.*TIM\d.*:gptimer.*', 'timer_v1/TIM_GP16'),
|
('.*TIM\d.*:gptimer.*', 'timer_v1/TIM_GP16'),
|
||||||
('.*ETH:ethermac110_v3_0', 'eth_v2/ETH'),
|
('.*ETH:ethermac110_v3_0', 'eth_v2/ETH'),
|
||||||
|
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user