Add aes, crc, tsc and comp
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Dion Dokter
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7b08f67dfb
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a4d4695635
138
data/registers/comp_u0.yaml
Normal file
138
data/registers/comp_u0.yaml
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@ -0,0 +1,138 @@
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block/COMP:
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description: Comparator.
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items:
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- name: CSR
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description: Comparator control and status register.
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byte_offset: 0
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fieldset: CSR
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fieldset/CSR:
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description: control and status register.
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fields:
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- name: EN
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description: Enable
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bit_offset: 0
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bit_size: 1
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- name: INMSEL
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description: Input minus selection bits.
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bit_offset: 4
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bit_size: 4
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- name: INPSEL
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description: Input plus selection bit.
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bit_offset: 8
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bit_size: 3
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- name: WINMODE
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description: Comparator 1 noninverting input selector for window mode.
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bit_offset: 14
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bit_size: 1
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enum: WINMODE
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- name: WINOUT
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description: Comparator 1 output selector.
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bit_offset: 14
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bit_size: 1
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enum: WINOUT
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- name: POLARITY
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description: Polarity selection bit.
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bit_offset: 15
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bit_size: 1
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enum: POLARITY
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- name: HYST
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description: Hysteresis selection bits.
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bit_offset: 16
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bit_size: 2
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enum: HYST
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- name: PWRMODE
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description: Power Mode.
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bit_offset: 18
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bit_size: 2
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enum: PWRMODE
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- name: BLANKSEL
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description: Blanking source selection bits.
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bit_offset: 20
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bit_size: 5
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enum: BLANKING
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- name: BRGEN
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description: Scaler bridge enable.
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bit_offset: 22
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bit_size: 1
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- name: VALUE
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description: Output status bit.
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bit_offset: 30
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bit_size: 1
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- name: LOCK
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description: Register lock bit.
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bit_offset: 31
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bit_size: 1
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enum/BLANKING:
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bit_size: 5
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variants:
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- name: NoBlanking
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description: No blanking.
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value: 0
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- name: TIM1OC4
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description: TIM1 OC4 enabled as blanking source
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value: 1
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- name: TIM1OC5
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description: TIM1 OC5 enabled as blanking source
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value: 2
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- name: TIM2OC3
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description: TIM5 OC3 enabled as blanking source
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value: 4
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- name: TIM3OC3
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description: TIM3 OC3 enabled as blanking source
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value: 8
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- name: TIM15OC2
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description: TIM15 OC2 enabled as blanking source
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value: 16
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enum/HYST:
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bit_size: 2
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variants:
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- name: None
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value: 0
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- name: Low
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value: 1
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- name: Medium
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value: 2
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- name: High
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value: 3
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enum/WINMODE:
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bit_size: 1
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variants:
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- name: ThisInpsel
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description: Signal selected with INPSEL[2:0] bitfield of this register.
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value: 0
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- name: OtherInpsel
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description: Signal selected with INPSEL[2:0] bitfield of the other register (required for window mode).
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value: 1
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enum/WINOUT:
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bit_size: 1
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variants:
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- name: COMP1_VALUE
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description: Comparator 1 value.
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value: 0
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- name: COMP1_VALUE XOR COMP2_VALUE
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description: Comparator 1 value XOR comparator 2 value (required for window mode).
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value: 1
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enum/POLARITY:
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bit_size: 1
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variants:
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- name: NotInverted
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description: Output is not inverted.
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value: 0
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- name: Inverted
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description: Output is inverted.
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value: 1
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enum/PWRMODE:
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bit_size: 2
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variants:
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- name: HighSpeed
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description: High speed / full power.
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value: 0
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- name: MediumSpeed
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description: Medium speed / medium power.
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value: 1
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- name: LowSpeed
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description: Low speed / low power.
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value: 2
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- name: VeryLowSpeed
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description: Very-low speed / ultra-low power.
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value: 3
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@ -150,6 +150,7 @@ impl PeriMatcher {
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("STM32F7.*:AES:.*", ("aes", "f7", "AES")),
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("STM32F4.*:AES:.*", ("aes", "v1", "AES")),
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("STM32G0.*:AES:.*", ("aes", "v2", "AES")),
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("STM32U0.*:AES:.*", ("aes", "v2", "AES")),
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("STM32G4.*:AES:.*", ("aes", "v2", "AES")),
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("STM32L0.*:AES:.*", ("aes", "v1", "AES")),
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("STM32L1.*:AES:.*", ("aes", "v1", "AES")),
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@ -586,6 +587,7 @@ impl PeriMatcher {
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("STM32L[045].*:CRC:.*", ("crc", "v3", "CRC")),
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("STM32W[BL].*:CRC:.*", ("crc", "v3", "CRC")),
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("STM32C[0].*:CRC:.*", ("crc", "v3", "CRC")),
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("STM32U[0].*:CRC:.*", ("crc", "v3", "CRC")),
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("STM32U[5].*:CRC:.*", ("crc", "v3", "CRC")),
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(".*:LCD:lcdc1_v1.0.*", ("lcd", "v1", "LCD")),
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(".*:LCD:lcdc1_v1.2.*", ("lcd", "v2", "LCD")),
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@ -636,6 +638,7 @@ impl PeriMatcher {
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("STM32WBA.*:TSC:.*", ("tsc", "v1", "TSC")),
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("STM32L[045].*:TSC:.*", ("tsc", "v3", "TSC")),
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("STM32U5.*:TSC:.*", ("tsc", "v3", "TSC")),
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("STM32U0.*:TSC:.*", ("tsc", "v2", "TSC")),
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("*:VREFINTCAL:.*", ("vrefintcal", "v1", "VREFINTCAL")),
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("STM32U5.*:ADF[12]:.*", ("adf", "v1", "ADF")),
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(".*:HASH:hash1_v1_0", ("hash", "v1", "HASH")),
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@ -651,6 +654,7 @@ impl PeriMatcher {
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(".*:CRYP:cryp1_v2_2.*", ("cryp", "v2", "CRYP")),
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("STM32G0.1.*:.*:COMP:.*", ("comp", "v1", "COMP")),
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("STM32G4.*:.*:COMP:.*", ("comp", "v2", "COMP")),
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("STM32U0.*:.*:COMP:.*", ("comp", "u0", "COMP")),
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("STM32WL.*:.*:COMP:.*", ("comp", "v3", "COMP")),
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("STM32H7[45].*:COMP:.*", ("comp", "h7_b", "COMP")),
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("STM32H7[AB].*:COMP:.*", ("comp", "h7_a", "COMP")),
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