diff --git a/data/registers/comp_u0.yaml b/data/registers/comp_u0.yaml
new file mode 100644
index 0000000..1001f8b
--- /dev/null
+++ b/data/registers/comp_u0.yaml
@@ -0,0 +1,138 @@
+block/COMP:
+  description: Comparator.
+  items:
+  - name: CSR
+    description: Comparator control and status register.
+    byte_offset: 0
+    fieldset: CSR
+fieldset/CSR:
+  description: control and status register.
+  fields:
+  - name: EN
+    description: Enable
+    bit_offset: 0
+    bit_size: 1
+  - name: INMSEL
+    description: Input minus selection bits.
+    bit_offset: 4
+    bit_size: 4
+  - name: INPSEL
+    description: Input plus selection bit.
+    bit_offset: 8
+    bit_size: 3
+  - name: WINMODE
+    description: Comparator 1 noninverting input selector for window mode.
+    bit_offset: 14
+    bit_size: 1
+    enum: WINMODE
+  - name: WINOUT
+    description: Comparator 1 output selector.
+    bit_offset: 14
+    bit_size: 1
+    enum: WINOUT
+  - name: POLARITY
+    description: Polarity selection bit.
+    bit_offset: 15
+    bit_size: 1
+    enum: POLARITY
+  - name: HYST
+    description: Hysteresis selection bits.
+    bit_offset: 16
+    bit_size: 2
+    enum: HYST
+  - name: PWRMODE
+    description: Power Mode.
+    bit_offset: 18
+    bit_size: 2
+    enum: PWRMODE
+  - name: BLANKSEL
+    description: Blanking source selection bits.
+    bit_offset: 20
+    bit_size: 5
+    enum: BLANKING
+  - name: BRGEN
+    description: Scaler bridge enable.
+    bit_offset: 22
+    bit_size: 1
+  - name: VALUE
+    description: Output status bit.
+    bit_offset: 30
+    bit_size: 1
+  - name: LOCK
+    description: Register lock bit.
+    bit_offset: 31
+    bit_size: 1
+enum/BLANKING:
+  bit_size: 5
+  variants:
+  - name: NoBlanking
+    description: No blanking.
+    value: 0
+  - name: TIM1OC4
+    description: TIM1 OC4 enabled as blanking source
+    value: 1
+  - name: TIM1OC5
+    description: TIM1 OC5 enabled as blanking source
+    value: 2
+  - name: TIM2OC3
+    description: TIM5 OC3 enabled as blanking source
+    value: 4
+  - name: TIM3OC3
+    description: TIM3 OC3 enabled as blanking source
+    value: 8
+  - name: TIM15OC2
+    description: TIM15 OC2 enabled as blanking source
+    value: 16
+enum/HYST:
+  bit_size: 2
+  variants:
+  - name: None
+    value: 0
+  - name: Low
+    value: 1
+  - name: Medium
+    value: 2
+  - name: High
+    value: 3
+enum/WINMODE:
+  bit_size: 1
+  variants:
+  - name: ThisInpsel
+    description: Signal selected with INPSEL[2:0] bitfield of this register.
+    value: 0
+  - name: OtherInpsel
+    description: Signal selected with INPSEL[2:0] bitfield of the other register (required for window mode).
+    value: 1
+enum/WINOUT:
+  bit_size: 1
+  variants:
+  - name: COMP1_VALUE
+    description: Comparator 1 value.
+    value: 0
+  - name: COMP1_VALUE XOR COMP2_VALUE
+    description: Comparator 1 value XOR comparator 2 value (required for window mode).
+    value: 1
+enum/POLARITY:
+  bit_size: 1
+  variants:
+  - name: NotInverted
+    description: Output is not inverted.
+    value: 0
+  - name: Inverted
+    description: Output is inverted.
+    value: 1
+enum/PWRMODE:
+  bit_size: 2
+  variants:
+  - name: HighSpeed
+    description: High speed / full power.
+    value: 0
+  - name: MediumSpeed
+    description: Medium speed / medium power.
+    value: 1
+  - name: LowSpeed
+    description: Low speed / low power.
+    value: 2
+  - name: VeryLowSpeed
+    description: Very-low speed / ultra-low power.
+    value: 3
diff --git a/stm32-data-gen/src/chips.rs b/stm32-data-gen/src/chips.rs
index c5cad27..0ae06c6 100644
--- a/stm32-data-gen/src/chips.rs
+++ b/stm32-data-gen/src/chips.rs
@@ -150,6 +150,7 @@ impl PeriMatcher {
             ("STM32F7.*:AES:.*", ("aes", "f7", "AES")),
             ("STM32F4.*:AES:.*", ("aes", "v1", "AES")),
             ("STM32G0.*:AES:.*", ("aes", "v2", "AES")),
+            ("STM32U0.*:AES:.*", ("aes", "v2", "AES")),
             ("STM32G4.*:AES:.*", ("aes", "v2", "AES")),
             ("STM32L0.*:AES:.*", ("aes", "v1", "AES")),
             ("STM32L1.*:AES:.*", ("aes", "v1", "AES")),
@@ -586,6 +587,7 @@ impl PeriMatcher {
             ("STM32L[045].*:CRC:.*", ("crc", "v3", "CRC")),
             ("STM32W[BL].*:CRC:.*", ("crc", "v3", "CRC")),
             ("STM32C[0].*:CRC:.*", ("crc", "v3", "CRC")),
+            ("STM32U[0].*:CRC:.*", ("crc", "v3", "CRC")),
             ("STM32U[5].*:CRC:.*", ("crc", "v3", "CRC")),
             (".*:LCD:lcdc1_v1.0.*", ("lcd", "v1", "LCD")),
             (".*:LCD:lcdc1_v1.2.*", ("lcd", "v2", "LCD")),
@@ -636,6 +638,7 @@ impl PeriMatcher {
             ("STM32WBA.*:TSC:.*", ("tsc", "v1", "TSC")),
             ("STM32L[045].*:TSC:.*", ("tsc", "v3", "TSC")),
             ("STM32U5.*:TSC:.*", ("tsc", "v3", "TSC")),
+            ("STM32U0.*:TSC:.*", ("tsc", "v2", "TSC")),
             ("*:VREFINTCAL:.*", ("vrefintcal", "v1", "VREFINTCAL")),
             ("STM32U5.*:ADF[12]:.*", ("adf", "v1", "ADF")),
             (".*:HASH:hash1_v1_0", ("hash", "v1", "HASH")),
@@ -651,6 +654,7 @@ impl PeriMatcher {
             (".*:CRYP:cryp1_v2_2.*", ("cryp", "v2", "CRYP")),
             ("STM32G0.1.*:.*:COMP:.*", ("comp", "v1", "COMP")),
             ("STM32G4.*:.*:COMP:.*", ("comp", "v2", "COMP")),
+            ("STM32U0.*:.*:COMP:.*", ("comp", "u0", "COMP")),
             ("STM32WL.*:.*:COMP:.*", ("comp", "v3", "COMP")),
             ("STM32H7[45].*:COMP:.*", ("comp", "h7_b", "COMP")),
             ("STM32H7[AB].*:COMP:.*", ("comp", "h7_a", "COMP")),