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Merge pull request #315 from eZioPan/rm-enum-tim-cr1-arpe

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remove TIM CR1 ARPE enums, it just a enable/disable field
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Dario Nieuwenhuis 2023-12-14 13:17:34 +00:00 committed by GitHub
commit 91cee0d1fd
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1 changed files with 0 additions and 10 deletions
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data/registers/timer_v1.yaml
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@ -358,7 +358,6 @@ fieldset/CR1_BASIC:
description: Auto-reload preload enable
bit_offset: 7
bit_size: 1
enum: ARPE
fieldset/CR1_GP:
extends: CR1_BASIC
description: control register 1
@ -645,15 +644,6 @@ fieldset/SR_GP:
array:
len: 4
stride: 1
enum/ARPE:
bit_size: 1
variants:
- name: Disabled
description: TIMx_APRR register is not buffered
value: 0
- name: Enabled
description: TIMx_APRR register is buffered
value: 1
enum/CCDS:
bit_size: 1
variants: