Merge pull request #350 from tyler-gilbert/add-cordic-v1-for-stm32u5
add cordic_v1 for stm32u5
This commit is contained in:
Dario Nieuwenhuis
GitHub
commit
637af83747
13
.github/ci/build.sh
vendored
13
.github/ci/build.sh
vendored
@ -17,7 +17,10 @@ cargo fmt -- --check
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# so the diff will show this PR's effect
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git remote add upstream https://github.com/embassy-rs/stm32-data
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git fetch --depth 15 upstream main
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set +e
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git clone --depth 1 --branch stm32-data-$(git merge-base HEAD upstream/main) https://github.com/embassy-rs/stm32-data-generated/ build -q
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DIFF_OK=$?
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set -e
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# move the sources directory out of the cache if it exists
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mv /ci/cache/sources ./sources || true
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@ -27,6 +30,7 @@ mv /ci/cache/sources ./sources || true
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# move the sources directory into the cache
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mv ./sources /ci/cache/sources
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if [ $DIFF_OK -eq 0 ]; then
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# upload diff
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(
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cd build
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@ -34,6 +38,11 @@ mv ./sources /ci/cache/sources
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git diff --staged --color data | aha --black > /ci/artifacts/diff.html
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)
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cat > /ci/comment.md <<EOF
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diff: https://ci.embassy.dev/jobs/$(jq -r .id < /ci/job.json)/artifacts/diff.html
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EOF
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fi
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# upload generated data to a fake git repo at
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# https://ci.embassy.dev/jobs/$ID/artifacts/generated.git
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# this allows testing the corresponding embassy-stm32 PR before merging the stm32-data one.
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@ -47,7 +56,3 @@ mv ./sources /ci/cache/sources
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git update-server-info # generate .git/info/refs
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mv .git /ci/artifacts/generated.git
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)
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cat > /ci/comment.md <<EOF
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diff: https://ci.embassy.dev/jobs/$(jq -r .id < /ci/job.json)/artifacts/diff.html
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EOF
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187
data/registers/cordic_v1.yaml
Normal file
187
data/registers/cordic_v1.yaml
Normal file
@ -0,0 +1,187 @@
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block/CORDIC:
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description: CORDIC co-processor.
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items:
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- name: CSR
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description: Control and status register.
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byte_offset: 0
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fieldset: CSR
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- name: WDATA
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description: Argument register.
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byte_offset: 4
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bit_offset: 0
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bit_size: 32
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- name: RDATA
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description: Result register.
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byte_offset: 8
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bit_offset: 0
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bit_size: 32
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fieldset/CSR:
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description: Control and status register.
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fields:
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- name: FUNC
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description: Function.
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bit_offset: 0
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bit_size: 4
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enum: FUNC
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- name: PRECISION
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description: Precision required (number of iterations/cycles), where PRECISION = (number of iterations/4).
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bit_offset: 4
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bit_size: 4
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enum: PRECISION
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- name: SCALE
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description: Scaling factor (2^-n for arguments, 2^n for results).
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bit_offset: 8
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bit_size: 3
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- name: IEN
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description: Enable interrupt.
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bit_offset: 16
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bit_size: 1
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- name: DMAREN
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description: Enable DMA wread channel.
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bit_offset: 17
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bit_size: 1
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- name: DMAWEN
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description: Enable DMA write channel.
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bit_offset: 18
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bit_size: 1
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- name: NRES
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description: Number of results in the RDATA register.
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bit_offset: 19
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bit_size: 1
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enum: NRES
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- name: NARGS
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description: Number of arguments expected by the WDATA register.
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bit_offset: 20
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bit_size: 1
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enum: NARGS
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- name: RESSIZE
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description: Width of output data.
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bit_offset: 21
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bit_size: 1
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enum: RESSIZE
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- name: ARGSIZE
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description: Width of input data.
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bit_offset: 22
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bit_size: 1
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enum: ARGSIZE
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- name: RRDY
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description: Result ready flag.
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bit_offset: 31
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bit_size: 1
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enum/ARGSIZE:
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bit_size: 1
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variants:
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- name: Bits32
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description: Use 32 bit input values.
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value: 0
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- name: Bits16
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description: Use 16 bit input values.
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value: 1
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enum/FUNC:
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bit_size: 4
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variants:
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- name: Cosine
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description: Cosine function.
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value: 0
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- name: Sine
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description: Sine function.
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value: 1
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- name: Phase
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description: Phase function.
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value: 2
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- name: Modulus
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description: Modulus function.
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value: 3
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- name: Arctangent
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description: Arctangent function.
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value: 4
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- name: HyperbolicCosine
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description: Hyperbolic Cosine function.
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value: 5
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- name: HyperbolicSine
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description: Hyperbolic Sine function.
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value: 6
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- name: Arctanh
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description: Arctanh function.
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value: 7
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- name: NaturalLogarithm
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description: Natural Logarithm function.
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value: 8
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- name: SquareRoot
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description: Square Root function.
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value: 9
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enum/NARGS:
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bit_size: 1
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variants:
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- name: Num1
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description: Only single argument write is needed for next calculation.
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value: 0
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- name: Num2
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description: Two argument writes need to be performed for next calculation.
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value: 1
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enum/NRES:
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bit_size: 1
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variants:
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- name: Num1
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description: Only single result value will be returned. After a single read RRDY will be automatically cleared.
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value: 0
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- name: Num2
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description: Two return reads need to be performed. After two reads RRDY will be automatically cleared.
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value: 1
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enum/PRECISION:
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bit_size: 4
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variants:
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- name: Iters4
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description: 4 iterations.
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value: 1
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- name: Iters8
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description: 8 iterations.
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value: 2
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- name: Iters12
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description: 12 iterations.
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value: 3
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- name: Iters16
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description: 16 iterations.
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value: 4
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- name: Iters20
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description: 20 iterations.
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value: 5
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- name: Iters24
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description: 24 iterations.
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value: 6
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- name: Iters28
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description: 28 iterations.
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value: 7
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- name: Iters32
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description: 32 iterations.
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value: 8
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- name: Iters36
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description: 36 iterations.
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value: 9
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- name: Iters40
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description: 40 iterations.
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value: 10
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- name: Iters44
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description: 44 iterations.
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value: 11
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- name: Iters48
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description: 48 iterations.
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value: 12
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- name: Iters52
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description: 52 iterations.
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value: 13
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- name: Iters56
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description: 56 iterations.
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value: 14
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- name: Iters60
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description: 60 iterations.
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value: 15
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enum/RESSIZE:
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bit_size: 1
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variants:
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- name: Bits32
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description: Use 32 bit output values.
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value: 0
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- name: Bits16
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description: Use 16 bit output values.
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value: 1
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@ -514,6 +514,7 @@ impl PeriMatcher {
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("STM32L4.*:GFXMMU:.*", ("gfxmmu", "v1", "GFXMMU")),
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("STM32U5.*:GFXMMU:.*", ("gfxmmu", "v2", "GFXMMU")),
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("STM32U5.*:ICACHE:.*", ("icache", "v1", "ICACHE")),
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(".*:CORDIC:.*", ("cordic", "v1", "CORDIC")),
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("STM32F0x[128].*:TSC:.*", ("tsc", "v1", "TSC")),
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("STM32F3[07][123].*:TSC:.*", ("tsc", "v1", "TSC")),
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("STM32WB55.*:TSC:.*", ("tsc", "v2", "TSC")),
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