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rcc: add more mux data

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This commit is contained in:
xoviat 2023-10-14 17:20:25 -05:00
parent 68d77f487b
commit 5d51e3b706
7 changed files with 104 additions and 80 deletions
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8
data/registers/rcc_g4.yaml
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@ -1343,13 +1343,13 @@ fieldset/PLLCFGR:
enum/ADCSEL:
bit_size: 2
variants:
- name: NOCLK
- name: DISABLE
description: No clock selected
value: 0
- name: PLLP
- name: PLL1_P
description: PLL 'P' clock selected as ADC clock
value: 1
- name: SYSCLK
- name: SYS
description: System clock selected as ADC clock
value: 2
enum/CLK48SEL:
@ -1430,7 +1430,7 @@ enum/MCOSEL:
- name: NoClock
description: No clock, MCO output disabled
value: 0
- name: SYSCLK
- name: SYS
description: SYSCLK selected as MCO source
value: 1
- name: HSI16

6
data/registers/rcc_h5.yaml
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@ -2128,7 +2128,7 @@ enum/ADCDACSEL:
- name: HCLK
description: rcc_hclk selected as kernel clock (default after reset)
value: 0
- name: SYSCLK
- name: SYS
description: sys_ck selected as kernel clock
value: 1
- name: PLL2_R
@ -2287,7 +2287,7 @@ enum/LPUARTSEL:
- name: PLL2_Q
description: pll2_q_ck selected as kernel clock
value: 1
- name: PLL3_1
- name: PLL3_Q
description: pll3_q_ck selected as kernel clock
value: 2
- name: HSI
@ -2353,7 +2353,7 @@ enum/MCO1SEL:
enum/MCO2SEL:
bit_size: 3
variants:
- name: SYSCLK
- name: SYS
description: System clock selected for micro-controller clock output
value: 0
- name: PLL2_P

4
data/registers/rcc_h50.yaml
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@ -1338,7 +1338,7 @@ enum/ADCDACSEL:
- name: HCLK
description: rcc_hclk selected as kernel clock (default after reset)
value: 0
- name: SYSCLK
- name: SYS
description: sys_ck selected as kernel clock
value: 1
- name: PLL2_R
@ -1545,7 +1545,7 @@ enum/MCO1SEL:
enum/MCO2SEL:
bit_size: 3
variants:
- name: SYSCLK
- name: SYS
description: System clock selected for micro-controller clock output
value: 0
- name: PLL2_P

38
data/registers/rcc_h7.yaml
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@ -3517,7 +3517,7 @@ enum/CECSEL:
- name: LSI
description: LSI selected as peripheral clock
value: 1
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 2
enum/CKPERSEL:
@ -3556,8 +3556,8 @@ enum/FDCANSEL:
enum/FMCSEL:
bit_size: 2
variants:
- name: RCC_HCLK3
description: rcc_hclk3 selected as peripheral clock
- name: AHB3
description: AHB3 selected as peripheral clock
value: 0
- name: PLL1_Q
description: pll1_q selected as peripheral clock
@ -3631,10 +3631,10 @@ enum/I2C1235SEL:
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 1
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 2
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 3
enum/I2C4SEL:
@ -3646,10 +3646,10 @@ enum/I2C4SEL:
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 1
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 2
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 3
enum/LPTIM1SEL:
@ -3706,10 +3706,10 @@ enum/LPUARTSEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE
@ -5368,7 +5368,7 @@ enum/SPDIFRXSEL:
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
enum/SPI45SEL:
@ -5383,10 +5383,10 @@ enum/SPI45SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: HSE
@ -5404,10 +5404,10 @@ enum/SPI6SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: HSE
@ -5443,7 +5443,7 @@ enum/SWPSEL:
- name: PCLK
description: pclk selected as peripheral clock
value: 0
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 1
enum/TIMPRE:
@ -5467,10 +5467,10 @@ enum/USART16910SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE
@ -5488,10 +5488,10 @@ enum/USART234578SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE

52
data/registers/rcc_h7ab.yaml
View File

@ -2452,7 +2452,7 @@ enum/CECSEL:
- name: LSI
description: LSI selected as peripheral clock
value: 1
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 2
enum/CKPERSEL:
@ -2470,7 +2470,7 @@ enum/CKPERSEL:
enum/DFSDMSEL:
bit_size: 1
variants:
- name: RCC_PCLK2
- name: APB2
description: rcc_pclk2 selected as peripheral clock
value: 0
- name: SYS
@ -2491,7 +2491,7 @@ enum/FDCANSEL:
enum/FMCSEL:
bit_size: 2
variants:
- name: RCC_HCLK3
- name: AHB3
description: rcc_hclk3 selected as peripheral clock
value: 0
- name: PLL1_Q
@ -2560,37 +2560,37 @@ enum/HSIDIV:
enum/I2C1235SEL:
bit_size: 2
variants:
- name: RCC_PCLK1
- name: APB1
description: rcc_pclk1 selected as peripheral clock
value: 0
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 1
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 2
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 3
enum/I2C4SEL:
bit_size: 2
variants:
- name: RCC_PCLK4
- name: APB4
description: rcc_pclk4 selected as peripheral clock
value: 0
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 1
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 2
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 3
enum/LPTIM1SEL:
bit_size: 3
variants:
- name: RCC_PCLK1
- name: APB1
description: rcc_pclk1 selected as peripheral clock
value: 0
- name: PLL2_P
@ -2611,7 +2611,7 @@ enum/LPTIM1SEL:
enum/LPTIM2SEL:
bit_size: 3
variants:
- name: RCC_PCLK4
- name: APB4
description: rcc_pclk4 selected as peripheral clock
value: 0
- name: PLL2_P
@ -2641,10 +2641,10 @@ enum/LPUARTSEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE
@ -4303,7 +4303,7 @@ enum/SPDIFRXSEL:
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
enum/SPI45SEL:
@ -4318,10 +4318,10 @@ enum/SPI45SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: HSE
@ -4330,7 +4330,7 @@ enum/SPI45SEL:
enum/SPI6SEL:
bit_size: 3
variants:
- name: RCC_PCLK4
- name: APB4
description: rcc_pclk4 selected as peripheral clock
value: 0
- name: PLL2_Q
@ -4339,10 +4339,10 @@ enum/SPI6SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: HSE
@ -4378,7 +4378,7 @@ enum/SWPSEL:
- name: PCLK
description: pclk selected as peripheral clock
value: 0
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 1
enum/TIMPRE:
@ -4393,7 +4393,7 @@ enum/TIMPRE:
enum/USART16910SEL:
bit_size: 3
variants:
- name: RCC_PCLK2
- name: APB2
description: rcc_pclk2 selected as peripheral clock
value: 0
- name: PLL2_Q
@ -4402,10 +4402,10 @@ enum/USART16910SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE
@ -4414,7 +4414,7 @@ enum/USART16910SEL:
enum/USART234578SEL:
bit_size: 3
variants:
- name: RCC_PCLK1
- name: APB1
description: rcc_pclk1 selected as peripheral clock
value: 0
- name: PLL2_Q
@ -4423,10 +4423,10 @@ enum/USART234578SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE

52
data/registers/rcc_h7rm0433.yaml
View File

@ -3517,7 +3517,7 @@ enum/CECSEL:
- name: LSI
description: LSI selected as peripheral clock
value: 1
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 2
enum/CKPERSEL:
@ -3535,7 +3535,7 @@ enum/CKPERSEL:
enum/DFSDMSEL:
bit_size: 1
variants:
- name: RCC_PCLK2
- name: APB2
description: rcc_pclk2 selected as peripheral clock
value: 0
- name: SYS
@ -3556,7 +3556,7 @@ enum/FDCANSEL:
enum/FMCSEL:
bit_size: 2
variants:
- name: RCC_HCLK3
- name: AHB3
description: rcc_hclk3 selected as peripheral clock
value: 0
- name: PLL1_Q
@ -3625,37 +3625,37 @@ enum/HSIDIV:
enum/I2C1235SEL:
bit_size: 2
variants:
- name: RCC_PCLK1
- name: APB1
description: rcc_pclk1 selected as peripheral clock
value: 0
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 1
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 2
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 3
enum/I2C4SEL:
bit_size: 2
variants:
- name: RCC_PCLK4
- name: APB4
description: rcc_pclk4 selected as peripheral clock
value: 0
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 1
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 2
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 3
enum/LPTIM1SEL:
bit_size: 3
variants:
- name: RCC_PCLK1
- name: APB1
description: rcc_pclk1 selected as peripheral clock
value: 0
- name: PLL2_P
@ -3676,7 +3676,7 @@ enum/LPTIM1SEL:
enum/LPTIM2SEL:
bit_size: 3
variants:
- name: RCC_PCLK4
- name: APB4
description: rcc_pclk4 selected as peripheral clock
value: 0
- name: PLL2_P
@ -3706,10 +3706,10 @@ enum/LPUARTSEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE
@ -5368,7 +5368,7 @@ enum/SPDIFRXSEL:
- name: PLL3_R
description: pll3_r selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
enum/SPI45SEL:
@ -5383,10 +5383,10 @@ enum/SPI45SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: HSE
@ -5395,7 +5395,7 @@ enum/SPI45SEL:
enum/SPI6SEL:
bit_size: 3
variants:
- name: RCC_PCLK4
- name: APB4
description: rcc_pclk4 selected as peripheral clock
value: 0
- name: PLL2_Q
@ -5404,10 +5404,10 @@ enum/SPI6SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: HSE
@ -5443,7 +5443,7 @@ enum/SWPSEL:
- name: PCLK
description: pclk selected as peripheral clock
value: 0
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 1
enum/TIMPRE:
@ -5458,7 +5458,7 @@ enum/TIMPRE:
enum/USART16910SEL:
bit_size: 3
variants:
- name: RCC_PCLK2
- name: APB2
description: rcc_pclk2 selected as peripheral clock
value: 0
- name: PLL2_Q
@ -5467,10 +5467,10 @@ enum/USART16910SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE
@ -5479,7 +5479,7 @@ enum/USART16910SEL:
enum/USART234578SEL:
bit_size: 3
variants:
- name: RCC_PCLK1
- name: APB1
description: rcc_pclk1 selected as peripheral clock
value: 0
- name: PLL2_Q
@ -5488,10 +5488,10 @@ enum/USART234578SEL:
- name: PLL3_Q
description: pll3_q selected as peripheral clock
value: 2
- name: HSI_KER
- name: HSI
description: hsi_ker selected as peripheral clock
value: 3
- name: CSI_KER
- name: CSI
description: csi_ker selected as peripheral clock
value: 4
- name: LSE

24
stm32-data-gen/src/rcc.rs
View File

@ -33,6 +33,12 @@ impl PeripheralToClock {
"RCC_HCLK2",
"RCC_HCLK3",
"RCC_HCLK4",
"PLL3_1",
"NOCLK",
"PLLP",
"PLLQ",
"PLLR",
"SYSCLK",
]);
let rcc_enum_map: HashMap<&String, HashMap<&String, &Enum>> = {
@ -115,6 +121,24 @@ impl PeripheralToClock {
if let Some(peri) = field.name.strip_suffix("SW") {
check_mux(reg, &field.name)?;
family_muxes.insert(
peri.to_string(),
Mux {
register: reg.to_ascii_lowercase(),
field: field.name.to_ascii_lowercase(),
},
);
}
}
} else if let Some(_) = regex!(r"^fieldset/D\d?CCIPR$").captures(&key) {
for field in &body.fields {
if let Some(peri) = field.name.strip_suffix("SEL") {
if family_muxes.get(peri).is_some() && reg != "D1CCIPR" {
continue;
}
check_mux(reg, &field.name)?;
family_muxes.insert(
peri.to_string(),
Mux {