Merge pull request #349 from eZioPan/rcc-cleanup

rcc-cleanup

data/registers/rcc_h5.yaml

@@ -2068,37 +2068,30 @@ fieldset/SECCFGR:
     description: "HSI clock configuration and status bits security\r Set and reset by software."
     bit_offset: 0
     bit_size: 1
-    enum: SEC
   - name: HSESEC
     description: "HSE clock configuration bits, status bits and HSE_CSS security\r Set and reset by software."
     bit_offset: 1
     bit_size: 1
-    enum: SEC
   - name: CSISEC
     description: "CSI clock configuration and status bits security\r Set and reset by software."
     bit_offset: 2
     bit_size: 1
-    enum: SEC
   - name: LSISEC
     description: "LSI clock configuration and status bits security\r Set and reset by software."
     bit_offset: 3
     bit_size: 1
-    enum: SEC
   - name: LSESEC
     description: "LSE clock configuration and status bits security\r Set and reset by software."
     bit_offset: 4
     bit_size: 1
-    enum: SEC
   - name: SYSCLKSEC
     description: "SYSCLK clock selection, STOPWUCK bit, clock output on MCO configuration security\r Set and reset by software."
     bit_offset: 5
     bit_size: 1
-    enum: SEC
   - name: PRESCSEC
     description: "AHBx/APBx prescaler configuration bits security\r Set and reset by software."
     bit_offset: 6
     bit_size: 1
-    enum: SEC
   - name: PLLSEC
     description: "PLL1 clock configuration and status bits security\r Set and reset by software."
     bit_offset: 7
@@ -2106,22 +2099,18 @@ fieldset/SECCFGR:
     array:
       len: 3
       stride: 1
-    enum: SEC
   - name: HSI48SEC
     description: "HSI48 clock configuration and status bits security\r Set and reset by software."
     bit_offset: 11
     bit_size: 1
-    enum: SEC
   - name: RMVFSEC
     description: "Remove reset flag security\r Set and reset by software."
     bit_offset: 12
     bit_size: 1
-    enum: SEC
   - name: CKPERSELSEC
     description: "per_ck selection security\r Set and reset by software."
     bit_offset: 13
     bit_size: 1
-    enum: SEC
 enum/ADCDACSEL:
   bit_size: 3
   variants:
@@ -3964,15 +3953,6 @@ enum/SDMMCSEL:
   - name: PLL2_R
     description: pll2_r_ck selected as kernel clock
     value: 1
-enum/SEC:
-  bit_size: 1
-  variants:
-  - name: NonSecure
-    description: non secure
-    value: 0
-  - name: Secure
-    description: secure
-    value: 1
 enum/SPI1SEL:
   bit_size: 3
   variants:

data/registers/rcc_u5.yaml

@@ -2295,12 +2295,10 @@ fieldset/PRIVCFGR:
     description: "RCC secure functions privilege configuration\r Set and reset by software. This bit can be written only by a secure privileged access."
     bit_offset: 0
     bit_size: 1
-    enum: PRIV
   - name: NSPRIV
     description: "RCC non-secure functions privilege configuration\r Set and reset by software. This bit can be written only by privileged access, secure or non-secure."
     bit_offset: 1
     bit_size: 1
-    enum: PRIV
 fieldset/SECCFGR:
   description: RCC secure configuration register
   fields:
@@ -4266,15 +4264,6 @@ enum/PPRE:
   - name: Div16
     description: HCLK divided by 16
     value: 7
-enum/PRIV:
-  bit_size: 1
-  variants:
-  - name: UNPRIVILEGED
-    description: Read and write to secure functions can be done by privileged or unprivileged access.
-    value: 0
-  - name: PRIVILEGED
-    description: Read and write to secure functions can be done by privileged access only.
-    value: 1
 enum/RNGSEL:
   bit_size: 2
   variants:

transforms/RCC.yaml

@@ -10,6 +10,9 @@ transforms:
     to: $1$2$3
     skip_unmergeable: true
 
+  - !DeleteEnums
+    from: ^(SEC|PRIV|SECURITY)$
+
     #- !MakeFieldArray
     #    fieldsets: .*
     #    from: ([A-Z]+)\d([A-Z]*)