Merge pull request #252 from xoviat/adc-g4

g4: fix rcc adc generation and cleanup enums

data/registers/adc_v2.yaml

@@ -77,22 +77,18 @@ fieldset/CR1:
       description: Interrupt enable for EOC
       bit_offset: 5
       bit_size: 1
-      enum: EOCIE
     - name: AWDIE
       description: Analog watchdog interrupt enable
       bit_offset: 6
       bit_size: 1
-      enum: AWDIE
     - name: JEOCIE
       description: Interrupt enable for injected channels
       bit_offset: 7
       bit_size: 1
-      enum: JEOCIE
     - name: SCAN
       description: Scan mode
       bit_offset: 8
       bit_size: 1
-      enum: SCAN
     - name: AWDSGL
       description: Enable the watchdog on a single channel in scan mode
       bit_offset: 9
@@ -102,17 +98,14 @@ fieldset/CR1:
       description: Automatic injected group conversion
       bit_offset: 10
       bit_size: 1
-      enum: JAUTO
     - name: DISCEN
       description: Discontinuous mode on regular channels
       bit_offset: 11
       bit_size: 1
-      enum: DISCEN
     - name: JDISCEN
       description: Discontinuous mode on injected channels
       bit_offset: 12
       bit_size: 1
-      enum: JDISCEN
     - name: DISCNUM
       description: Discontinuous mode channel count
       bit_offset: 13
@@ -121,12 +114,10 @@ fieldset/CR1:
       description: Analog watchdog enable on injected channels
       bit_offset: 22
       bit_size: 1
-      enum: JAWDEN
     - name: AWDEN
       description: Analog watchdog enable on regular channels
       bit_offset: 23
       bit_size: 1
-      enum: AWDEN
     - name: RES
       description: Resolution
       bit_offset: 24
@@ -136,7 +127,6 @@ fieldset/CR1:
       description: Overrun interrupt enable
       bit_offset: 26
       bit_size: 1
-      enum: OVRIE
 fieldset/CR2:
   description: control register 2
   fields:
@@ -144,7 +134,6 @@ fieldset/CR2:
       description: A/D Converter ON / OFF
       bit_offset: 0
       bit_size: 1
-      enum: ADON
     - name: CONT
       description: Continuous conversion
       bit_offset: 1
@@ -154,7 +143,6 @@ fieldset/CR2:
       description: Direct memory access mode (for single ADC mode)
       bit_offset: 8
       bit_size: 1
-      enum: DMA
     - name: DDS
       description: DMA disable selection (for single ADC mode)
       bit_offset: 9
@@ -346,15 +334,6 @@ fieldset/SR:
       bit_offset: 5
       bit_size: 1
       enum: OVR
-enum/ADON:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Disable ADC conversion and go to power down mode
-      value: 0
-    - name: Enabled
-      description: Enable ADC
-      value: 1
 enum/ALIGN:
   bit_size: 1
   variants:
@@ -373,24 +352,6 @@ enum/AWD:
     - name: Event
       description: Analog watchdog event occurred
       value: 1
-enum/AWDEN:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Analog watchdog disabled on regular channels
-      value: 0
-    - name: Enabled
-      description: Analog watchdog enabled on regular channels
-      value: 1
-enum/AWDIE:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Analogue watchdog interrupt disabled
-      value: 0
-    - name: Enabled
-      description: Analogue watchdog interrupt enabled
-      value: 1
 enum/AWDSGL:
   bit_size: 1
   variants:
@@ -418,24 +379,6 @@ enum/DDS:
     - name: Continuous
       description: DMA requests are issued as long as data are converted and DMA=1
       value: 1
-enum/DISCEN:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Discontinuous mode on regular channels disabled
-      value: 0
-    - name: Enabled
-      description: Discontinuous mode on regular channels enabled
-      value: 1
-enum/DMA:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: DMA mode disabled
-      value: 0
-    - name: Enabled
-      description: DMA mode enabled
-      value: 1
 enum/EOC:
   bit_size: 1
   variants:
@@ -445,15 +388,6 @@ enum/EOC:
     - name: Complete
       description: Conversion complete
       value: 1
-enum/EOCIE:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: EOC interrupt disabled
-      value: 0
-    - name: Enabled
-      description: EOC interrupt enabled
-      value: 1
 enum/EOCS:
   bit_size: 1
   variants:
@@ -502,33 +436,6 @@ enum/EXTSEL:
     - name: TIM2TRGO
       description: Timer 2 TRGO event
       value: 6
-enum/JAUTO:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Automatic injected group conversion disabled
-      value: 0
-    - name: Enabled
-      description: Automatic injected group conversion enabled
-      value: 1
-enum/JAWDEN:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Analog watchdog disabled on injected channels
-      value: 0
-    - name: Enabled
-      description: Analog watchdog enabled on injected channels
-      value: 1
-enum/JDISCEN:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Discontinuous mode on injected channels disabled
-      value: 0
-    - name: Enabled
-      description: Discontinuous mode on injected channels enabled
-      value: 1
 enum/JEOC:
   bit_size: 1
   variants:
@@ -538,15 +445,6 @@ enum/JEOC:
     - name: Complete
       description: Conversion complete
       value: 1
-enum/JEOCIE:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: JEOC interrupt disabled
-      value: 0
-    - name: Enabled
-      description: JEOC interrupt enabled
-      value: 1
 enum/JEXTEN:
   bit_size: 2
   variants:
@@ -625,15 +523,6 @@ enum/OVR:
     - name: Overrun
       description: Overrun occurred
       value: 1
-enum/OVRIE:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Overrun interrupt disabled
-      value: 0
-    - name: Enabled
-      description: Overrun interrupt enabled
-      value: 1
 enum/RES:
   bit_size: 2
   variants:
@@ -676,15 +565,6 @@ enum/SAMPLE_TIME:
     - name: Cycles480
       description: 480 cycles
       value: 7
-enum/SCAN:
-  bit_size: 1
-  variants:
-    - name: Disabled
-      description: Scan mode disabled
-      value: 0
-    - name: Enabled
-      description: Scan mode enabled
-      value: 1
 enum/SMPR_SMPx_x:
   bit_size: 32
   variants:

stm32-data-gen/src/rcc.rs

@@ -123,6 +123,11 @@ impl PeripheralToClock {
             }
         }
 
+        // If adc is 3, 4, or 5, check for ADC345
+        if (peri_name == "ADC3" || peri_name == "ADC4" || peri_name == "ADC5") && clocks.contains_key("ADC345") {
+            return clocks.get("ADC345");
+        }
+
         // Look for bare ADC clock register
         if clocks.contains_key("ADC") {
             return clocks.get("ADC");