H7 RCC: Make more arrays

This commit is contained in:
Thales Fragoso 2021-05-17 21:28:24 -03:00
parent 4199b328ee
commit 2dda36bd49

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@ -3736,20 +3736,13 @@ fieldset/PLLCFGR:
len: 3
stride: 4
enum: PLL1VCOSEL
- name: PLL1RGE
- name: PLLRGE
description: PLL1 input frequency range
bit_offset: 2
bit_size: 2
enum: PLL1RGE
- name: PLL2RGE
description: PLL2 input frequency range
bit_offset: 6
bit_size: 2
enum: PLL1RGE
- name: PLL3RGE
description: PLL3 input frequency range
bit_offset: 10
bit_size: 2
array:
len: 3
stride: 4
enum: PLL1RGE
- name: DIVPEN
description: PLL1 DIVP divider output enable