Add three distinct versions of CRC
- remove F4 specific version
This commit is contained in:
Joshua Salzedo
parent
a8a8b88661
commit
24dabf68e5
@ -1,45 +0,0 @@
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block/CRC:
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description: Cryptographic processor
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items:
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- byte_offset: 0
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description: Data register
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fieldset: DR
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name: DR
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- byte_offset: 4
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description: Independent Data register
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fieldset: IDR
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name: IDR
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- access: Write
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byte_offset: 8
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description: Control register
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fieldset: CR
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name: CR
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enum/RESETW:
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bit_size: 1
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variants:
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- description: Resets the CRC calculation unit and sets the data register to 0xFFFF
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FFFF
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name: Reset
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value: 1
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fieldset/CR:
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description: Control register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Control regidter
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enum_write: RESETW
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name: RESET
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fieldset/DR:
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description: Data register
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fields:
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- bit_offset: 0
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bit_size: 32
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description: Data Register
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name: DR
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fieldset/IDR:
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description: Independent Data register
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fields:
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- bit_offset: 0
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bit_size: 8
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description: Independent Data register
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name: IDR
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45
data/registers/crc_v1.yaml
Normal file
45
data/registers/crc_v1.yaml
Normal file
@ -0,0 +1,45 @@
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---
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block/CRC:
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description: Cryptographic processor
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items:
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- name: DR
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description: Data register
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byte_offset: 0
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fieldset: DR
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- name: IDR
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description: Independent Data register
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byte_offset: 4
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fieldset: IDR
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- name: CR
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description: Control register
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byte_offset: 8
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access: Write
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fieldset: CR
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fieldset/CR:
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description: Control register
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fields:
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- name: RESET
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description: Control regidter
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bit_offset: 0
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bit_size: 1
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enum_write: RESETW
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fieldset/DR:
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description: Data register
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fields:
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- name: DR
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description: Data Register
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bit_offset: 0
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bit_size: 32
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fieldset/IDR:
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description: Independent Data register
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fields:
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- name: IDR
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description: Independent Data register
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bit_offset: 0
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bit_size: 8
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enum/RESETW:
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bit_size: 1
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variants:
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- name: Reset
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description: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF
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value: 1
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139
data/registers/crc_v2.yaml
Normal file
139
data/registers/crc_v2.yaml
Normal file
@ -0,0 +1,139 @@
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---
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block/CRC:
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description: cyclic redundancy check calculation unit
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items:
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- name: DR
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description: Data register
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byte_offset: 0
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fieldset: DR
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- name: DR16
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description: Data register - half-word sized
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byte_offset: 0
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bit_size: 16
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fieldset: DR16
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- name: DR8
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description: Data register - byte sized
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byte_offset: 0
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bit_size: 8
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fieldset: DR8
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- name: IDR
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description: Independent data register
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byte_offset: 4
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fieldset: IDR
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- name: CR
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description: Control register
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byte_offset: 8
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fieldset: CR
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- name: INIT
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description: Initial CRC value
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byte_offset: 16
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fieldset: INIT
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fieldset/CR:
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description: Control register
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fields:
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- name: RESET
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description: reset bit
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bit_offset: 0
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bit_size: 1
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enum_write: RESETW
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- name: POLYSIZE
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description: Polynomial size
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bit_offset: 3
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bit_size: 2
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enum: POLYSIZE
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- name: REV_IN
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description: Reverse input data
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bit_offset: 5
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bit_size: 2
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enum: REV_IN
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- name: REV_OUT
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description: Reverse output data
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bit_offset: 7
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bit_size: 1
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enum: REV_OUT
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fieldset/DR:
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description: Data register
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fields:
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- name: DR
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description: Data register bits
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bit_offset: 0
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bit_size: 32
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fieldset/DR16:
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description: Data register - half-word sized
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fields:
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- name: DR
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description: Data register bits
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bit_offset: 0
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bit_size: 16
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array:
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len: 1
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stride: 0
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fieldset/DR8:
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description: Data register - byte sized
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fields:
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- name: DR
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description: Data register bits
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bit_offset: 0
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bit_size: 8
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array:
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len: 1
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stride: 0
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fieldset/IDR:
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description: Independent data register
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fields:
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- name: IDR
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description: General-purpose 8-bit data register bits
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bit_offset: 0
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bit_size: 8
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fieldset/INIT:
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description: Initial CRC value
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fields:
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- name: INIT
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description: Programmable initial CRC value
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bit_offset: 0
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bit_size: 32
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enum/POLYSIZE:
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bit_size: 2
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variants:
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- name: Polysize32
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description: 32-bit polynomial
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value: 0
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- name: Polysize16
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description: 16-bit polynomial
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value: 1
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- name: Polysize8
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description: 8-bit polynomial
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value: 2
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- name: Polysize7
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description: 7-bit polynomial
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value: 3
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enum/RESETW:
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bit_size: 1
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variants:
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- name: Reset
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description: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF
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value: 1
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enum/REV_IN:
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bit_size: 2
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variants:
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- name: Normal
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description: Bit order not affected
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value: 0
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- name: Byte
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description: Bit reversal done by byte
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value: 1
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- name: HalfWord
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description: Bit reversal done by half-word
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value: 2
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- name: Word
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description: Bit reversal done by word
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value: 3
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enum/REV_OUT:
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bit_size: 1
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variants:
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- name: Normal
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description: Bit order not affected
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value: 0
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- name: Reversed
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description: Bit reversed output
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value: 1
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151
data/registers/crc_v3.yaml
Normal file
151
data/registers/crc_v3.yaml
Normal file
@ -0,0 +1,151 @@
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---
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block/CRC:
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description: Cryptographic processor
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items:
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- name: DR
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description: Data register
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byte_offset: 0
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fieldset: DR
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- name: DR16
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description: Data register - half-word sized
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byte_offset: 0
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bit_size: 16
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fieldset: DR16
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- name: DR8
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description: Data register - byte sized
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byte_offset: 0
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bit_size: 8
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fieldset: DR8
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- name: IDR
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description: Independent Data register
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byte_offset: 4
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fieldset: IDR
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- name: CR
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description: Control register
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byte_offset: 8
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access: Write
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fieldset: CR
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- name: INIT
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description: Initial CRC value
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byte_offset: 16
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fieldset: INIT
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- name: POL
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description: CRC polynomial
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byte_offset: 20
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fieldset: POL
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fieldset/CR:
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description: Control register
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fields:
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- name: RESET
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description: RESET bit
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bit_offset: 0
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bit_size: 1
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enum_write: RESETW
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- name: POLYSIZE
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description: Polynomial size
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bit_offset: 3
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bit_size: 2
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enum: POLYSIZE
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- name: REV_IN
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description: Reverse input data
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bit_offset: 5
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bit_size: 2
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enum: REV_IN
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- name: REV_OUT
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description: Reverse output data
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bit_offset: 7
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bit_size: 1
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enum: REV_OUT
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fieldset/DR:
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description: Data register
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fields:
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- name: DR
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description: Data Register
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bit_offset: 0
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bit_size: 32
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fieldset/DR16:
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description: Data register - half-word sized
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fields:
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- name: DR
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description: Data register bits
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bit_offset: 0
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bit_size: 16
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array:
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len: 1
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stride: 0
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fieldset/DR8:
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description: Data register - byte sized
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fields:
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- name: DR
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description: Data register bits
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bit_offset: 0
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bit_size: 8
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array:
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len: 1
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stride: 0
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fieldset/IDR:
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description: Independent Data register
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fields:
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- name: IDR
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description: Independent Data register
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bit_offset: 0
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bit_size: 8
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fieldset/INIT:
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description: Initial CRC value
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fields:
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- name: INIT
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description: Programmable initial CRC value
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bit_offset: 0
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bit_size: 32
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fieldset/POL:
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description: CRC polynomial
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fields:
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- name: POL
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description: Programmable polynomial
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bit_offset: 0
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bit_size: 32
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enum/POLYSIZE:
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bit_size: 2
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variants:
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- name: Polysize32
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description: 32-bit polynomial
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value: 0
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- name: Polysize16
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description: 16-bit polynomial
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value: 1
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- name: Polysize8
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description: 8-bit polynomial
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value: 2
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- name: Polysize7
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description: 7-bit polynomial
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value: 3
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enum/RESETW:
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bit_size: 1
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variants:
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- name: Reset
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description: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF
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value: 1
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enum/REV_IN:
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bit_size: 2
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variants:
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- name: Normal
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description: Bit order not affected
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value: 0
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- name: Byte
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description: Bit reversal done by byte
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value: 1
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- name: HalfWord
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description: Bit reversal done by half-word
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value: 2
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- name: Word
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description: Bit reversal done by word
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value: 3
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enum/REV_OUT:
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bit_size: 1
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variants:
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- name: Normal
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description: Bit order not affected
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value: 0
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- name: Reversed
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description: Bit reversed output
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value: 1
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