diff --git a/data/registers/crc_f4.yaml b/data/registers/crc_f4.yaml deleted file mode 100644 index 146d161..0000000 --- a/data/registers/crc_f4.yaml +++ /dev/null @@ -1,45 +0,0 @@ -block/CRC: - description: Cryptographic processor - items: - - byte_offset: 0 - description: Data register - fieldset: DR - name: DR - - byte_offset: 4 - description: Independent Data register - fieldset: IDR - name: IDR - - access: Write - byte_offset: 8 - description: Control register - fieldset: CR - name: CR -enum/RESETW: - bit_size: 1 - variants: - - description: Resets the CRC calculation unit and sets the data register to 0xFFFF - FFFF - name: Reset - value: 1 -fieldset/CR: - description: Control register - fields: - - bit_offset: 0 - bit_size: 1 - description: Control regidter - enum_write: RESETW - name: RESET -fieldset/DR: - description: Data register - fields: - - bit_offset: 0 - bit_size: 32 - description: Data Register - name: DR -fieldset/IDR: - description: Independent Data register - fields: - - bit_offset: 0 - bit_size: 8 - description: Independent Data register - name: IDR diff --git a/data/registers/crc_v1.yaml b/data/registers/crc_v1.yaml new file mode 100644 index 0000000..2586515 --- /dev/null +++ b/data/registers/crc_v1.yaml @@ -0,0 +1,45 @@ +--- +block/CRC: + description: Cryptographic processor + items: + - name: DR + description: Data register + byte_offset: 0 + fieldset: DR + - name: IDR + description: Independent Data register + byte_offset: 4 + fieldset: IDR + - name: CR + description: Control register + byte_offset: 8 + access: Write + fieldset: CR +fieldset/CR: + description: Control register + fields: + - name: RESET + description: Control regidter + bit_offset: 0 + bit_size: 1 + enum_write: RESETW +fieldset/DR: + description: Data register + fields: + - name: DR + description: Data Register + bit_offset: 0 + bit_size: 32 +fieldset/IDR: + description: Independent Data register + fields: + - name: IDR + description: Independent Data register + bit_offset: 0 + bit_size: 8 +enum/RESETW: + bit_size: 1 + variants: + - name: Reset + description: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF + value: 1 diff --git a/data/registers/crc_v2.yaml b/data/registers/crc_v2.yaml new file mode 100644 index 0000000..337b43c --- /dev/null +++ b/data/registers/crc_v2.yaml @@ -0,0 +1,139 @@ +--- +block/CRC: + description: cyclic redundancy check calculation unit + items: + - name: DR + description: Data register + byte_offset: 0 + fieldset: DR + - name: DR16 + description: Data register - half-word sized + byte_offset: 0 + bit_size: 16 + fieldset: DR16 + - name: DR8 + description: Data register - byte sized + byte_offset: 0 + bit_size: 8 + fieldset: DR8 + - name: IDR + description: Independent data register + byte_offset: 4 + fieldset: IDR + - name: CR + description: Control register + byte_offset: 8 + fieldset: CR + - name: INIT + description: Initial CRC value + byte_offset: 16 + fieldset: INIT +fieldset/CR: + description: Control register + fields: + - name: RESET + description: reset bit + bit_offset: 0 + bit_size: 1 + enum_write: RESETW + - name: POLYSIZE + description: Polynomial size + bit_offset: 3 + bit_size: 2 + enum: POLYSIZE + - name: REV_IN + description: Reverse input data + bit_offset: 5 + bit_size: 2 + enum: REV_IN + - name: REV_OUT + description: Reverse output data + bit_offset: 7 + bit_size: 1 + enum: REV_OUT +fieldset/DR: + description: Data register + fields: + - name: DR + description: Data register bits + bit_offset: 0 + bit_size: 32 +fieldset/DR16: + description: Data register - half-word sized + fields: + - name: DR + description: Data register bits + bit_offset: 0 + bit_size: 16 + array: + len: 1 + stride: 0 +fieldset/DR8: + description: Data register - byte sized + fields: + - name: DR + description: Data register bits + bit_offset: 0 + bit_size: 8 + array: + len: 1 + stride: 0 +fieldset/IDR: + description: Independent data register + fields: + - name: IDR + description: General-purpose 8-bit data register bits + bit_offset: 0 + bit_size: 8 +fieldset/INIT: + description: Initial CRC value + fields: + - name: INIT + description: Programmable initial CRC value + bit_offset: 0 + bit_size: 32 +enum/POLYSIZE: + bit_size: 2 + variants: + - name: Polysize32 + description: 32-bit polynomial + value: 0 + - name: Polysize16 + description: 16-bit polynomial + value: 1 + - name: Polysize8 + description: 8-bit polynomial + value: 2 + - name: Polysize7 + description: 7-bit polynomial + value: 3 +enum/RESETW: + bit_size: 1 + variants: + - name: Reset + description: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF + value: 1 +enum/REV_IN: + bit_size: 2 + variants: + - name: Normal + description: Bit order not affected + value: 0 + - name: Byte + description: Bit reversal done by byte + value: 1 + - name: HalfWord + description: Bit reversal done by half-word + value: 2 + - name: Word + description: Bit reversal done by word + value: 3 +enum/REV_OUT: + bit_size: 1 + variants: + - name: Normal + description: Bit order not affected + value: 0 + - name: Reversed + description: Bit reversed output + value: 1 diff --git a/data/registers/crc_v3.yaml b/data/registers/crc_v3.yaml new file mode 100644 index 0000000..0eba325 --- /dev/null +++ b/data/registers/crc_v3.yaml @@ -0,0 +1,151 @@ +--- +block/CRC: + description: Cryptographic processor + items: + - name: DR + description: Data register + byte_offset: 0 + fieldset: DR + - name: DR16 + description: Data register - half-word sized + byte_offset: 0 + bit_size: 16 + fieldset: DR16 + - name: DR8 + description: Data register - byte sized + byte_offset: 0 + bit_size: 8 + fieldset: DR8 + - name: IDR + description: Independent Data register + byte_offset: 4 + fieldset: IDR + - name: CR + description: Control register + byte_offset: 8 + access: Write + fieldset: CR + - name: INIT + description: Initial CRC value + byte_offset: 16 + fieldset: INIT + - name: POL + description: CRC polynomial + byte_offset: 20 + fieldset: POL +fieldset/CR: + description: Control register + fields: + - name: RESET + description: RESET bit + bit_offset: 0 + bit_size: 1 + enum_write: RESETW + - name: POLYSIZE + description: Polynomial size + bit_offset: 3 + bit_size: 2 + enum: POLYSIZE + - name: REV_IN + description: Reverse input data + bit_offset: 5 + bit_size: 2 + enum: REV_IN + - name: REV_OUT + description: Reverse output data + bit_offset: 7 + bit_size: 1 + enum: REV_OUT +fieldset/DR: + description: Data register + fields: + - name: DR + description: Data Register + bit_offset: 0 + bit_size: 32 +fieldset/DR16: + description: Data register - half-word sized + fields: + - name: DR + description: Data register bits + bit_offset: 0 + bit_size: 16 + array: + len: 1 + stride: 0 +fieldset/DR8: + description: Data register - byte sized + fields: + - name: DR + description: Data register bits + bit_offset: 0 + bit_size: 8 + array: + len: 1 + stride: 0 +fieldset/IDR: + description: Independent Data register + fields: + - name: IDR + description: Independent Data register + bit_offset: 0 + bit_size: 8 +fieldset/INIT: + description: Initial CRC value + fields: + - name: INIT + description: Programmable initial CRC value + bit_offset: 0 + bit_size: 32 +fieldset/POL: + description: CRC polynomial + fields: + - name: POL + description: Programmable polynomial + bit_offset: 0 + bit_size: 32 +enum/POLYSIZE: + bit_size: 2 + variants: + - name: Polysize32 + description: 32-bit polynomial + value: 0 + - name: Polysize16 + description: 16-bit polynomial + value: 1 + - name: Polysize8 + description: 8-bit polynomial + value: 2 + - name: Polysize7 + description: 7-bit polynomial + value: 3 +enum/RESETW: + bit_size: 1 + variants: + - name: Reset + description: Resets the CRC calculation unit and sets the data register to 0xFFFF FFFF + value: 1 +enum/REV_IN: + bit_size: 2 + variants: + - name: Normal + description: Bit order not affected + value: 0 + - name: Byte + description: Bit reversal done by byte + value: 1 + - name: HalfWord + description: Bit reversal done by half-word + value: 2 + - name: Word + description: Bit reversal done by word + value: 3 +enum/REV_OUT: + bit_size: 1 + variants: + - name: Normal + description: Bit order not affected + value: 0 + - name: Reversed + description: Bit reversed output + value: 1