Merge pull request #84 from lulf/l1-regs

L1 regs

data/registers/dbgmcu_l1.yaml

@@ -0,0 +1,117 @@
+---
+block/DBGMCU:
+  description: debug support
+  items:
+    - name: IDCODE
+      description: DBGMCU_IDCODE
+      byte_offset: 0
+      access: Read
+      fieldset: IDCODE
+    - name: CR
+      description: Debug MCU configuration register
+      byte_offset: 4
+      fieldset: CR
+    - name: APB1_FZ
+      description: Debug MCU APB1 freeze register1
+      byte_offset: 8
+      fieldset: APB1_FZ
+    - name: APB2_FZ
+      description: Debug MCU APB1 freeze register 2
+      byte_offset: 12
+      fieldset: APB2_FZ
+fieldset/APB1_FZ:
+  description: Debug MCU APB1 freeze register1
+  fields:
+    - name: DBG_TIM2_STOP
+      description: TIM2 counter stopped when core is halted
+      bit_offset: 0
+      bit_size: 1
+    - name: DBG_TIM3_STOP
+      description: TIM3 counter stopped when core is halted
+      bit_offset: 1
+      bit_size: 1
+    - name: DBG_TIM4_STOP
+      description: TIM4 counter stopped when core is halted
+      bit_offset: 2
+      bit_size: 1
+    - name: DBG_TIM5_STOP
+      description: TIM5 counter stopped when core is halted
+      bit_offset: 3
+      bit_size: 1
+    - name: DBG_TIM6_STOP
+      description: TIM6 counter stopped when core is halted
+      bit_offset: 4
+      bit_size: 1
+    - name: DBG_TIM7_STOP
+      description: TIM7 counter stopped when core is halted
+      bit_offset: 5
+      bit_size: 1
+    - name: DBG_RTC_STOP
+      description: Debug RTC stopped when core is halted
+      bit_offset: 10
+      bit_size: 1
+    - name: DBG_WWDG_STOP
+      description: Debug window watchdog stopped when core is halted
+      bit_offset: 11
+      bit_size: 1
+    - name: DBG_IWDG_STOP
+      description: Debug independent watchdog stopped when core is halted
+      bit_offset: 12
+      bit_size: 1
+    - name: DBG_I2C1_SMBUS_TIMEOUT
+      description: SMBUS timeout mode stopped when core is halted
+      bit_offset: 21
+      bit_size: 1
+    - name: DBG_I2C2_SMBUS_TIMEOUT
+      description: SMBUS timeout mode stopped when core is halted
+      bit_offset: 22
+      bit_size: 1
+fieldset/APB2_FZ:
+  description: Debug MCU APB1 freeze register 2
+  fields:
+    - name: DBG_TIM9_STOP
+      description: TIM counter stopped when core is halted
+      bit_offset: 2
+      bit_size: 1
+    - name: DBG_TIM10_STOP
+      description: TIM counter stopped when core is halted
+      bit_offset: 3
+      bit_size: 1
+    - name: DBG_TIM11_STOP
+      description: TIM counter stopped when core is halted
+      bit_offset: 4
+      bit_size: 1
+fieldset/CR:
+  description: Debug MCU configuration register
+  fields:
+    - name: DBG_SLEEP
+      description: Debug Sleep mode
+      bit_offset: 0
+      bit_size: 1
+    - name: DBG_STOP
+      description: Debug Stop mode
+      bit_offset: 1
+      bit_size: 1
+    - name: DBG_STANDBY
+      description: Debug Standby mode
+      bit_offset: 2
+      bit_size: 1
+    - name: TRACE_IOEN
+      description: Trace pin assignment control
+      bit_offset: 5
+      bit_size: 1
+    - name: TRACE_MODE
+      description: Trace pin assignment control
+      bit_offset: 6
+      bit_size: 2
+fieldset/IDCODE:
+  description: DBGMCU_IDCODE
+  fields:
+    - name: DEV_ID
+      description: Device identifier
+      bit_offset: 0
+      bit_size: 12
+    - name: REV_ID
+      description: Revision identifie
+      bit_offset: 16
+      bit_size: 16

data/registers/syscfg_l1.yaml

@@ -0,0 +1,51 @@
+---
+block/SYSCFG:
+  description: System configuration controller
+  items:
+    - name: MEMRMP
+      description: memory remap register
+      byte_offset: 0
+      fieldset: MEMRMP
+    - name: PMC
+      description: peripheral mode configuration register
+      byte_offset: 4
+      fieldset: PMC
+    - name: EXTICR
+      description: external interrupt configuration register 1
+      array:
+        len: 4
+        stride: 4
+      byte_offset: 8
+      fieldset: EXTICR
+fieldset/EXTICR:
+  description: external interrupt configuration register 3
+  fields:
+    - name: EXTI
+      description: EXTI x configuration (x = 8 to 11)
+      bit_offset: 0
+      bit_size: 4
+      array:
+        len: 4
+        stride: 4
+fieldset/MEMRMP:
+  description: memory remap register
+  fields:
+    - name: MEM_MODE
+      description: MEM_MODE
+      bit_offset: 0
+      bit_size: 2
+    - name: BOOT_MODE
+      description: BOOT_MODE
+      bit_offset: 8
+      bit_size: 2
+fieldset/PMC:
+  description: peripheral mode configuration register
+  fields:
+    - name: USB_PU
+      description: USB pull-up
+      bit_offset: 0
+      bit_size: 1
+    - name: LCD_CAPA
+      description: USB pull-up enable on DP line
+      bit_offset: 1
+      bit_size: 5

parse.py

@@ -348,6 +348,7 @@ perimap = [
     ('STM32F4.*:SYS:.*', 'syscfg_f4/SYSCFG'),
     ('STM32L4.*:SYS:.*', 'syscfg_l4/SYSCFG'),
     ('STM32L0.*:SYS:.*', 'syscfg_l0/SYSCFG'),
+    ('STM32L1.*:SYS:.*', 'syscfg_l1/SYSCFG'),
     ('STM32H7.*:SYS:.*', 'syscfg_h7/SYSCFG'),
     ('STM32G0.*:SYS:.*', 'syscfg_g0/SYSCFG'),
     ('STM32WB.*:SYS:.*', 'syscfg_wb/SYSCFG'),
@@ -405,6 +406,7 @@ perimap = [
     ('.*:STM32G4_dbgmcu_v1_0', 'dbgmcu_g4/DBGMCU'),
     ('.*:STM32H7_dbgmcu_v1_0', 'dbgmcu_h7/DBGMCU'),
     ('.*:STM32L0_dbgmcu_v1_0', 'dbgmcu_l0/DBGMCU'),
+    ('.*:STM32L1_dbgmcu_v1_0', 'dbgmcu_l1/DBGMCU'),
     ('.*:STM32L4_dbgmcu_v1_0', 'dbgmcu_l4/DBGMCU'),
     ('.*:STM32WB_dbgmcu_v1_0', 'dbgmcu_wb/DBGMCU'),
     ('.*:STM32WL_dbgmcu_v1_0', 'dbgmcu_wl/DBGMCU'),
@@ -430,6 +432,8 @@ address_overrides = {
     'STM32F412VE:GPIOG_BASE': 0x40021800,
     'STM32F412VG:GPIOF_BASE': 0x40021400,
     'STM32F412VG:GPIOG_BASE': 0x40021800,
+    'STM32L151CB-A:GPIOF_BASE': 0x40021800,
+    'STM32L151CB-A:GPIOG_BASE': 0x40021C00,
 }