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Fix Issue #225.

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The STM32U5 uses the same CRS peripheral as the L0, G0, and G4 products. This adds the association of the CRS v1 peripheral to the U5 CRS registers.
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Tyler Gilbert
2023-07-30 08:37:22 -05:00
parent 93a98a7610
commit 170ecab8cb
1 changed files with 1 additions and 0 deletions
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stm32-data-gen/src/chips.rs
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@ -298,6 +298,7 @@ impl PeriMatcher {
("STM32G0B1.*:CRS:.*", ("crs", "v1", "CRS")), ("STM32G0B1.*:CRS:.*", ("crs", "v1", "CRS")),
("STM32G0C1.*:CRS:.*", ("crs", "v1", "CRS")), ("STM32G0C1.*:CRS:.*", ("crs", "v1", "CRS")),
("STM32G4.*:CRS:.*", ("crs", "v1", "CRS")), ("STM32G4.*:CRS:.*", ("crs", "v1", "CRS")),
("STM32U5.*:CRS:.*", ("crs", "v1", "CRS")),
(".*SDMMC:sdmmc2_v1_0", ("sdmmc", "v2", "SDMMC")), (".*SDMMC:sdmmc2_v1_0", ("sdmmc", "v2", "SDMMC")),
("STM32C0.*:PWR:.*", ("pwr", "c0", "PWR")), ("STM32C0.*:PWR:.*", ("pwr", "c0", "PWR")),
("STM32G0.*:PWR:.*", ("pwr", "g0", "PWR")), ("STM32G0.*:PWR:.*", ("pwr", "g0", "PWR")),