From 170ecab8cb9c60262c8eca8c53225603feaa8128 Mon Sep 17 00:00:00 2001 From: Tyler Gilbert Date: Sun, 30 Jul 2023 08:37:22 -0500 Subject: [PATCH] Fix Issue #225. The STM32U5 uses the same CRS peripheral as the L0, G0, and G4 products. This adds the association of the CRS v1 peripheral to the U5 CRS registers. --- stm32-data-gen/src/chips.rs | 1 + 1 file changed, 1 insertion(+) diff --git a/stm32-data-gen/src/chips.rs b/stm32-data-gen/src/chips.rs index 92b3ae9..2933221 100644 --- a/stm32-data-gen/src/chips.rs +++ b/stm32-data-gen/src/chips.rs @@ -298,6 +298,7 @@ impl PeriMatcher { ("STM32G0B1.*:CRS:.*", ("crs", "v1", "CRS")), ("STM32G0C1.*:CRS:.*", ("crs", "v1", "CRS")), ("STM32G4.*:CRS:.*", ("crs", "v1", "CRS")), + ("STM32U5.*:CRS:.*", ("crs", "v1", "CRS")), (".*SDMMC:sdmmc2_v1_0", ("sdmmc", "v2", "SDMMC")), ("STM32C0.*:PWR:.*", ("pwr", "c0", "PWR")), ("STM32G0.*:PWR:.*", ("pwr", "g0", "PWR")),