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rcc: pipe through sel mux

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This commit is contained in:
xoviat 2023-09-25 19:26:46 -05:00
parent 1551a1c01a
commit 1595920962
3 changed files with 31 additions and 0 deletions
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21
stm32-data-gen/src/rcc.rs
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@ -14,6 +14,24 @@ impl PeripheralToClock {
for (rcc_name, ir) in &registers.registers { for (rcc_name, ir) in &registers.registers {
if let Some(rcc_name) = rcc_name.strip_prefix("rcc_") { if let Some(rcc_name) = rcc_name.strip_prefix("rcc_") {
let mut family_muxes = HashMap::new();
for (reg, body) in &ir.fieldsets {
let key = format!("fieldset/{reg}");
if let Some(_) = regex!(r"^fieldset/CCIPR\d?$").captures(&key) {
for field in &body.fields {
if let Some(peri) = field.name.strip_suffix("SEL") {
family_muxes.insert(
peri.to_string(),
stm32_data_serde::chip::core::peripheral::rcc::Mux {
register: reg.clone(),
field: field.name.clone(),
},
);
}
}
}
}
let mut family_clocks = HashMap::new(); let mut family_clocks = HashMap::new();
for (reg, body) in &ir.fieldsets { for (reg, body) in &ir.fieldsets {
let key = format!("fieldset/{reg}"); let key = format!("fieldset/{reg}");
@ -49,6 +67,8 @@ impl PeripheralToClock {
} }
} }
let mux = family_muxes.get(peri).map(|peri| peri.clone());
let res = stm32_data_serde::chip::core::peripheral::Rcc { let res = stm32_data_serde::chip::core::peripheral::Rcc {
clock: peri_clock, clock: peri_clock,
enable: stm32_data_serde::chip::core::peripheral::rcc::Enable { enable: stm32_data_serde::chip::core::peripheral::rcc::Enable {
@ -56,6 +76,7 @@ impl PeripheralToClock {
field: field.name.clone(), field: field.name.clone(),
}, },
reset, reset,
mux,
}; };
family_clocks.insert(peri.to_string(), res); family_clocks.insert(peri.to_string(), res);

8
stm32-data-serde/src/lib.rs
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@ -103,6 +103,8 @@ pub mod chip {
pub enable: rcc::Enable, pub enable: rcc::Enable,
#[serde(skip_serializing_if = "Option::is_none")] #[serde(skip_serializing_if = "Option::is_none")]
pub reset: Option<rcc::Reset>, pub reset: Option<rcc::Reset>,
#[serde(skip_serializing_if = "Option::is_none")]
pub mux: Option<rcc::Mux>,
} }
pub mod rcc { pub mod rcc {
@ -119,6 +121,12 @@ pub mod chip {
pub register: String, pub register: String,
pub field: String, pub field: String,
} }
#[derive(Clone, Debug, Eq, PartialEq, Hash, PartialOrd, Ord, Serialize, Deserialize)]
pub struct Mux {
pub register: String,
pub field: String,
}
} }
#[derive(Clone, Debug, Eq, PartialEq, Hash, PartialOrd, Ord, Serialize, Deserialize)] #[derive(Clone, Debug, Eq, PartialEq, Hash, PartialOrd, Ord, Serialize, Deserialize)]

2
stm32-metapac-gen/src/data.rs
View File

@ -85,6 +85,8 @@ pub struct PeripheralRcc {
pub enable: Option<PeripheralRccRegister>, pub enable: Option<PeripheralRccRegister>,
#[serde(default)] #[serde(default)]
pub reset: Option<PeripheralRccRegister>, pub reset: Option<PeripheralRccRegister>,
#[serde(default)]
pub mux: Option<PeripheralRccRegister>,
} }
#[derive(Debug, Eq, PartialEq, Clone, Deserialize)] #[derive(Debug, Eq, PartialEq, Clone, Deserialize)]