Fix regs
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5f350c7c25
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06fd321be1
@ -240,10 +240,6 @@ fieldset/AHB1RSTR:
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bit_size: 1
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bit_size: 1
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description: GFXMMU reset
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description: GFXMMU reset
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name: GFXMMURST
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name: GFXMMURST
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- bit_offset: 11
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bit_size: 1
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description: CRC reset
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name: CRCRST
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fieldset/AHB1SMENR:
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fieldset/AHB1SMENR:
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description: AHB1 peripheral clocks enable in Sleep and Stop modes register
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description: AHB1 peripheral clocks enable in Sleep and Stop modes register
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fields:
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fields:
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@ -342,6 +338,10 @@ fieldset/AHB2ENR:
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bit_size: 1
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bit_size: 1
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description: HASH clock enable
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description: HASH clock enable
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name: HASHEN
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name: HASHEN
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- bit_offset: 17
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bit_size: 1
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description: HASH clock enable
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name: HASH1EN
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- bit_offset: 18
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- bit_offset: 18
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bit_size: 1
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bit_size: 1
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description: Random Number Generator clock enable
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description: Random Number Generator clock enable
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@ -354,10 +354,6 @@ fieldset/AHB2ENR:
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bit_size: 1
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bit_size: 1
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description: SDMMC1 clock enable
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description: SDMMC1 clock enable
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name: SDMMC1EN
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name: SDMMC1EN
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- bit_offset: 17
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bit_size: 1
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description: HASH clock enable
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name: HASH1EN
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fieldset/AHB2RSTR:
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fieldset/AHB2RSTR:
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description: AHB2 peripheral reset register
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description: AHB2 peripheral reset register
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fields:
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fields:
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@ -417,6 +413,10 @@ fieldset/AHB2RSTR:
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bit_size: 1
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bit_size: 1
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description: Hash reset
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description: Hash reset
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name: HASHRST
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name: HASHRST
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- bit_offset: 17
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bit_size: 1
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description: Hash reset
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name: HASH1RST
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- bit_offset: 18
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- bit_offset: 18
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bit_size: 1
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bit_size: 1
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description: Random number generator reset
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description: Random number generator reset
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@ -429,10 +429,6 @@ fieldset/AHB2RSTR:
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bit_size: 1
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bit_size: 1
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description: SDMMC1 reset
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description: SDMMC1 reset
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name: SDMMC1RST
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name: SDMMC1RST
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- bit_offset: 17
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bit_size: 1
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description: Hash reset
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name: HASH1RST
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fieldset/AHB2SMENR:
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fieldset/AHB2SMENR:
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description: AHB2 peripheral clocks enable in Sleep and Stop modes register
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description: AHB2 peripheral clocks enable in Sleep and Stop modes register
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fields:
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fields:
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@ -500,6 +496,10 @@ fieldset/AHB2SMENR:
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bit_size: 1
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bit_size: 1
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description: HASH clock enable during Sleep and Stop modes
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description: HASH clock enable during Sleep and Stop modes
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name: HASHSMEN
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name: HASHSMEN
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- bit_offset: 17
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bit_size: 1
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description: HASH clock enable during Sleep and Stop modes
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name: HASH1SMEN
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- bit_offset: 18
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- bit_offset: 18
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bit_size: 1
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bit_size: 1
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description: Random Number Generator clocks enable during Sleep and Stop modes
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description: Random Number Generator clocks enable during Sleep and Stop modes
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@ -512,10 +512,6 @@ fieldset/AHB2SMENR:
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bit_size: 1
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bit_size: 1
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description: SDMMC1 clocks enable during Sleep and Stop modes
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description: SDMMC1 clocks enable during Sleep and Stop modes
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name: SDMMC1SMEN
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name: SDMMC1SMEN
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- bit_offset: 17
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bit_size: 1
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description: HASH clock enable during Sleep and Stop modes
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name: HASH1SMEN
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fieldset/AHB3ENR:
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fieldset/AHB3ENR:
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description: AHB3 peripheral clock enable register
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description: AHB3 peripheral clock enable register
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fields:
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fields:
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@ -523,14 +519,14 @@ fieldset/AHB3ENR:
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bit_size: 1
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bit_size: 1
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description: Flexible memory controller clock enable
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description: Flexible memory controller clock enable
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name: FMCEN
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name: FMCEN
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- bit_offset: 9
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bit_size: 1
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description: OSPI2EN memory interface clock enable
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name: OSPI2EN
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- bit_offset: 8
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- bit_offset: 8
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bit_size: 1
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bit_size: 1
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description: QSPIEN
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description: QSPIEN
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name: QSPIEN
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name: QSPIEN
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- bit_offset: 9
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bit_size: 1
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description: OSPI2EN memory interface clock enable
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name: OSPI2EN
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fieldset/AHB3RSTR:
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fieldset/AHB3RSTR:
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description: AHB3 peripheral reset register
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description: AHB3 peripheral reset register
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fields:
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fields:
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@ -538,14 +534,14 @@ fieldset/AHB3RSTR:
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bit_size: 1
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bit_size: 1
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description: Flexible memory controller reset
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description: Flexible memory controller reset
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name: FMCRST
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name: FMCRST
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- bit_offset: 9
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bit_size: 1
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description: OctOSPI2 memory interface reset
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name: OSPI2RST
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- bit_offset: 8
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- bit_offset: 8
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bit_size: 1
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bit_size: 1
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description: Quad SPI memory interface reset
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description: Quad SPI memory interface reset
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name: QSPIRST
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name: QSPIRST
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- bit_offset: 9
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bit_size: 1
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description: OctOSPI2 memory interface reset
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name: OSPI2RST
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fieldset/AHB3SMENR:
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fieldset/AHB3SMENR:
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description: AHB3 peripheral clocks enable in Sleep and Stop modes register
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description: AHB3 peripheral clocks enable in Sleep and Stop modes register
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fields:
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fields:
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@ -553,14 +549,14 @@ fieldset/AHB3SMENR:
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bit_size: 1
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bit_size: 1
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description: Flexible memory controller clocks enable during Sleep and Stop modes
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description: Flexible memory controller clocks enable during Sleep and Stop modes
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name: FMCSMEN
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name: FMCSMEN
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- bit_offset: 9
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bit_size: 1
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description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
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name: OCTOSPI2
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- bit_offset: 8
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- bit_offset: 8
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bit_size: 1
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bit_size: 1
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description: QSPISMEN
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description: QSPISMEN
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name: QSPISMEN
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name: QSPISMEN
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- bit_offset: 9
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bit_size: 1
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description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
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name: OCTOSPI2
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fieldset/APB1ENR1:
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fieldset/APB1ENR1:
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description: APB1ENR1
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description: APB1ENR1
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fields:
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fields:
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@ -588,6 +584,10 @@ fieldset/APB1ENR1:
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bit_size: 1
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bit_size: 1
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description: TIM7 timer clock enable
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description: TIM7 timer clock enable
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name: TIM7EN
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name: TIM7EN
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- bit_offset: 9
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bit_size: 1
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description: LCD clock enable
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name: LCDEN
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- bit_offset: 10
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- bit_offset: 10
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bit_size: 1
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bit_size: 1
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description: RTC APB clock enable
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description: RTC APB clock enable
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@ -604,6 +604,10 @@ fieldset/APB1ENR1:
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bit_size: 1
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bit_size: 1
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description: SPI peripheral 3 clock enable
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description: SPI peripheral 3 clock enable
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name: SPI3EN
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name: SPI3EN
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- bit_offset: 15
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bit_size: 1
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description: SPI3 clock enable
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name: SP3EN
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- bit_offset: 17
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- bit_offset: 17
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bit_size: 1
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bit_size: 1
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description: USART2 clock enable
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description: USART2 clock enable
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@ -612,6 +616,10 @@ fieldset/APB1ENR1:
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bit_size: 1
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bit_size: 1
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description: USART3 clock enable
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description: USART3 clock enable
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name: USART3EN
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name: USART3EN
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- bit_offset: 18
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bit_size: 1
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description: USART1 clock enable
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name: USART1EN
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- bit_offset: 19
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- bit_offset: 19
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bit_size: 1
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bit_size: 1
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description: UART4 clock enable
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description: UART4 clock enable
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@ -640,6 +648,18 @@ fieldset/APB1ENR1:
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bit_size: 1
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bit_size: 1
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description: CAN1 clock enable
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description: CAN1 clock enable
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name: CAN1EN
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name: CAN1EN
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- bit_offset: 26
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bit_size: 1
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description: USB FS clock enable
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name: USBF
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- bit_offset: 26
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bit_size: 1
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description: USB FS clock enable
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name: USBFSEN
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- bit_offset: 26
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bit_size: 1
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description: CAN2 clock enable
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name: CAN2EN
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- bit_offset: 28
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- bit_offset: 28
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bit_size: 1
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bit_size: 1
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description: Power interface clock enable
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description: Power interface clock enable
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@ -656,30 +676,6 @@ fieldset/APB1ENR1:
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bit_size: 1
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bit_size: 1
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description: Low power timer 1 clock enable
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description: Low power timer 1 clock enable
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name: LPTIM1EN
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name: LPTIM1EN
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- bit_offset: 9
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bit_size: 1
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description: LCD clock enable
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name: LCDEN
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- bit_offset: 18
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bit_size: 1
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description: USART1 clock enable
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name: USART1EN
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- bit_offset: 26
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bit_size: 1
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description: USB FS clock enable
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name: USBF
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- bit_offset: 26
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bit_size: 1
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description: USB FS clock enable
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name: USBFSEN
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- bit_offset: 15
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bit_size: 1
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description: SPI3 clock enable
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name: SP3EN
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- bit_offset: 26
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bit_size: 1
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description: CAN2 clock enable
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name: CAN2EN
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fieldset/APB1ENR2:
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fieldset/APB1ENR2:
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description: APB1 peripheral clock enable register 2
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description: APB1 peripheral clock enable register 2
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fields:
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fields:
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@ -691,14 +687,14 @@ fieldset/APB1ENR2:
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bit_size: 1
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bit_size: 1
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description: I2C4 clock enable
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description: I2C4 clock enable
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name: I2C4EN
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name: I2C4EN
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- bit_offset: 5
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bit_size: 1
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description: LPTIM2EN
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name: LPTIM2EN
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- bit_offset: 2
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- bit_offset: 2
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bit_size: 1
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bit_size: 1
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description: Single wire protocol clock enable
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description: Single wire protocol clock enable
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name: SWPMI1EN
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name: SWPMI1EN
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- bit_offset: 5
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bit_size: 1
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description: LPTIM2EN
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name: LPTIM2EN
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- bit_offset: 24
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- bit_offset: 24
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bit_size: 1
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bit_size: 1
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description: DFSDMEN enable
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description: DFSDMEN enable
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@ -730,6 +726,10 @@ fieldset/APB1RSTR1:
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bit_size: 1
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bit_size: 1
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description: TIM7 timer reset
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description: TIM7 timer reset
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name: TIM7RST
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name: TIM7RST
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- bit_offset: 9
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bit_size: 1
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description: LCD interface reset
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name: LCDRST
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- bit_offset: 14
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- bit_offset: 14
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bit_size: 1
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bit_size: 1
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description: SPI2 reset
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description: SPI2 reset
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@ -750,6 +750,10 @@ fieldset/APB1RSTR1:
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bit_size: 1
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bit_size: 1
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description: UART4 reset
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description: UART4 reset
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name: UART4RST
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name: UART4RST
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- bit_offset: 19
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bit_size: 1
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description: USART4 reset.
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name: USART4RST
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- bit_offset: 20
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- bit_offset: 20
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bit_size: 1
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bit_size: 1
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description: UART5 reset
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description: UART5 reset
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@ -774,6 +778,14 @@ fieldset/APB1RSTR1:
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bit_size: 1
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bit_size: 1
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description: CAN1 reset
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description: CAN1 reset
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name: CAN1RST
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name: CAN1RST
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- bit_offset: 26
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bit_size: 1
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description: USB FS reset
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name: USBFSRST
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- bit_offset: 26
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bit_size: 1
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description: CAN2 reset
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name: CAN2RST
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- bit_offset: 28
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- bit_offset: 28
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bit_size: 1
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bit_size: 1
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description: Power interface reset
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description: Power interface reset
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@ -790,22 +802,6 @@ fieldset/APB1RSTR1:
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bit_size: 1
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bit_size: 1
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description: Low Power Timer 1 reset
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description: Low Power Timer 1 reset
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name: LPTIM1RST
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name: LPTIM1RST
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- bit_offset: 9
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bit_size: 1
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description: LCD interface reset
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name: LCDRST
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- bit_offset: 19
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bit_size: 1
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description: USART4 reset.
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name: USART4RST
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- bit_offset: 26
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bit_size: 1
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description: USB FS reset
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name: USBFSRST
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- bit_offset: 26
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bit_size: 1
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description: CAN2 reset
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name: CAN2RST
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fieldset/APB1RSTR2:
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fieldset/APB1RSTR2:
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description: APB1 peripheral reset register 2
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description: APB1 peripheral reset register 2
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fields:
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fields:
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@ -817,14 +813,14 @@ fieldset/APB1RSTR2:
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bit_size: 1
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bit_size: 1
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description: I2C4 reset
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description: I2C4 reset
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name: I2C4RST
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name: I2C4RST
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- bit_offset: 5
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bit_size: 1
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description: Low-power timer 2 reset
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name: LPTIM2RST
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- bit_offset: 2
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- bit_offset: 2
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bit_size: 1
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bit_size: 1
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description: Single wire protocol reset
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description: Single wire protocol reset
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name: SWPMI1RST
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name: SWPMI1RST
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- bit_offset: 5
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bit_size: 1
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description: Low-power timer 2 reset
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name: LPTIM2RST
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fieldset/APB1SMENR1:
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fieldset/APB1SMENR1:
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description: APB1SMENR1
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description: APB1SMENR1
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fields:
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fields:
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@ -852,6 +848,10 @@ fieldset/APB1SMENR1:
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bit_size: 1
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bit_size: 1
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description: TIM7 timer clocks enable during Sleep and Stop modes
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description: TIM7 timer clocks enable during Sleep and Stop modes
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name: TIM7SMEN
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name: TIM7SMEN
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- bit_offset: 9
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bit_size: 1
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description: LCD clocks enable during Sleep and Stop modes
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name: LCDSMEN
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- bit_offset: 10
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- bit_offset: 10
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bit_size: 1
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bit_size: 1
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description: RTC APB clock enable during Sleep and Stop modes
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description: RTC APB clock enable during Sleep and Stop modes
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@ -872,6 +872,10 @@ fieldset/APB1SMENR1:
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bit_size: 1
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bit_size: 1
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description: USART2 clocks enable during Sleep and Stop modes
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description: USART2 clocks enable during Sleep and Stop modes
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name: USART2SMEN
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name: USART2SMEN
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- bit_offset: 17
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bit_size: 1
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description: USART1 clocks enable during Sleep and Stop modes
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name: USART1SMEN
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- bit_offset: 18
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- bit_offset: 18
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bit_size: 1
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bit_size: 1
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description: USART3 clocks enable during Sleep and Stop modes
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description: USART3 clocks enable during Sleep and Stop modes
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@ -880,6 +884,10 @@ fieldset/APB1SMENR1:
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bit_size: 1
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bit_size: 1
|
||||||
description: UART4 clocks enable during Sleep and Stop modes
|
description: UART4 clocks enable during Sleep and Stop modes
|
||||||
name: UART4SMEN
|
name: UART4SMEN
|
||||||
|
- bit_offset: 19
|
||||||
|
bit_size: 1
|
||||||
|
description: USART2 clocks enable during Sleep and Stop modes
|
||||||
|
name: USART4SMEN
|
||||||
- bit_offset: 20
|
- bit_offset: 20
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: UART5 clocks enable during Sleep and Stop modes
|
description: UART5 clocks enable during Sleep and Stop modes
|
||||||
@ -904,6 +912,14 @@ fieldset/APB1SMENR1:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: CAN1 clocks enable during Sleep and Stop modes
|
description: CAN1 clocks enable during Sleep and Stop modes
|
||||||
name: CAN1SMEN
|
name: CAN1SMEN
|
||||||
|
- bit_offset: 26
|
||||||
|
bit_size: 1
|
||||||
|
description: USB FS clock enable during Sleep and Stop modes
|
||||||
|
name: USBFSSMEN
|
||||||
|
- bit_offset: 26
|
||||||
|
bit_size: 1
|
||||||
|
description: CAN2 clocks enable during Sleep and Stop modes
|
||||||
|
name: CAN2SMEN
|
||||||
- bit_offset: 28
|
- bit_offset: 28
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Power interface clocks enable during Sleep and Stop modes
|
description: Power interface clocks enable during Sleep and Stop modes
|
||||||
@ -920,26 +936,6 @@ fieldset/APB1SMENR1:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Low power timer 1 clocks enable during Sleep and Stop modes
|
description: Low power timer 1 clocks enable during Sleep and Stop modes
|
||||||
name: LPTIM1SMEN
|
name: LPTIM1SMEN
|
||||||
- bit_offset: 9
|
|
||||||
bit_size: 1
|
|
||||||
description: LCD clocks enable during Sleep and Stop modes
|
|
||||||
name: LCDSMEN
|
|
||||||
- bit_offset: 17
|
|
||||||
bit_size: 1
|
|
||||||
description: USART1 clocks enable during Sleep and Stop modes
|
|
||||||
name: USART1SMEN
|
|
||||||
- bit_offset: 18
|
|
||||||
bit_size: 1
|
|
||||||
description: USART2 clocks enable during Sleep and Stop modes
|
|
||||||
name: USART2SMEN
|
|
||||||
- bit_offset: 26
|
|
||||||
bit_size: 1
|
|
||||||
description: USB FS clock enable during Sleep and Stop modes
|
|
||||||
name: USBFSSMEN
|
|
||||||
- bit_offset: 26
|
|
||||||
bit_size: 1
|
|
||||||
description: CAN2 clocks enable during Sleep and Stop modes
|
|
||||||
name: CAN2SMEN
|
|
||||||
fieldset/APB1SMENR2:
|
fieldset/APB1SMENR2:
|
||||||
description: APB1 peripheral clocks enable in Sleep and Stop modes register 2
|
description: APB1 peripheral clocks enable in Sleep and Stop modes register 2
|
||||||
fields:
|
fields:
|
||||||
@ -951,14 +947,14 @@ fieldset/APB1SMENR2:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: I2C4 clocks enable during Sleep and Stop modes
|
description: I2C4 clocks enable during Sleep and Stop modes
|
||||||
name: I2C4SMEN
|
name: I2C4SMEN
|
||||||
- bit_offset: 5
|
|
||||||
bit_size: 1
|
|
||||||
description: LPTIM2SMEN
|
|
||||||
name: LPTIM2SMEN
|
|
||||||
- bit_offset: 2
|
- bit_offset: 2
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Single wire protocol clocks enable during Sleep and Stop modes
|
description: Single wire protocol clocks enable during Sleep and Stop modes
|
||||||
name: SWPMI1SMEN
|
name: SWPMI1SMEN
|
||||||
|
- bit_offset: 5
|
||||||
|
bit_size: 1
|
||||||
|
description: LPTIM2SMEN
|
||||||
|
name: LPTIM2SMEN
|
||||||
fieldset/APB2ENR:
|
fieldset/APB2ENR:
|
||||||
description: APB2ENR
|
description: APB2ENR
|
||||||
fields:
|
fields:
|
||||||
@ -970,6 +966,14 @@ fieldset/APB2ENR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Firewall clock enable
|
description: Firewall clock enable
|
||||||
name: FWEN
|
name: FWEN
|
||||||
|
- bit_offset: 7
|
||||||
|
bit_size: 1
|
||||||
|
description: Firewall clock enable
|
||||||
|
name: FIREWALLEN
|
||||||
|
- bit_offset: 10
|
||||||
|
bit_size: 1
|
||||||
|
description: SDMMC clock enable
|
||||||
|
name: SDMMCEN
|
||||||
- bit_offset: 11
|
- bit_offset: 11
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: TIM1 timer clock enable
|
description: TIM1 timer clock enable
|
||||||
@ -1010,6 +1014,10 @@ fieldset/APB2ENR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: DFSDM timer clock enable
|
description: DFSDM timer clock enable
|
||||||
name: DFSDM1EN
|
name: DFSDM1EN
|
||||||
|
- bit_offset: 24
|
||||||
|
bit_size: 1
|
||||||
|
description: DFSDM timer clock enable
|
||||||
|
name: DFSDMEN
|
||||||
- bit_offset: 26
|
- bit_offset: 26
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: LCD-TFT clock enable
|
description: LCD-TFT clock enable
|
||||||
@ -1018,18 +1026,6 @@ fieldset/APB2ENR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: DSI clock enable
|
description: DSI clock enable
|
||||||
name: DSIEN
|
name: DSIEN
|
||||||
- bit_offset: 7
|
|
||||||
bit_size: 1
|
|
||||||
description: Firewall clock enable
|
|
||||||
name: FIREWALLEN
|
|
||||||
- bit_offset: 10
|
|
||||||
bit_size: 1
|
|
||||||
description: SDMMC clock enable
|
|
||||||
name: SDMMCEN
|
|
||||||
- bit_offset: 24
|
|
||||||
bit_size: 1
|
|
||||||
description: DFSDM timer clock enable
|
|
||||||
name: DFSDMEN
|
|
||||||
fieldset/APB2RSTR:
|
fieldset/APB2RSTR:
|
||||||
description: APB2 peripheral reset register
|
description: APB2 peripheral reset register
|
||||||
fields:
|
fields:
|
||||||
@ -1037,6 +1033,10 @@ fieldset/APB2RSTR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: System configuration (SYSCFG) reset
|
description: System configuration (SYSCFG) reset
|
||||||
name: SYSCFGRST
|
name: SYSCFGRST
|
||||||
|
- bit_offset: 10
|
||||||
|
bit_size: 1
|
||||||
|
description: SDMMC reset
|
||||||
|
name: SDMMCRST
|
||||||
- bit_offset: 11
|
- bit_offset: 11
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: TIM1 timer reset
|
description: TIM1 timer reset
|
||||||
@ -1077,6 +1077,10 @@ fieldset/APB2RSTR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Digital filters for sigma-delata modulators (DFSDM) reset
|
description: Digital filters for sigma-delata modulators (DFSDM) reset
|
||||||
name: DFSDM1RST
|
name: DFSDM1RST
|
||||||
|
- bit_offset: 24
|
||||||
|
bit_size: 1
|
||||||
|
description: DFSDM filter reset
|
||||||
|
name: DFSDMRST
|
||||||
- bit_offset: 26
|
- bit_offset: 26
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: LCD-TFT reset
|
description: LCD-TFT reset
|
||||||
@ -1085,14 +1089,6 @@ fieldset/APB2RSTR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: DSI reset
|
description: DSI reset
|
||||||
name: DSIRST
|
name: DSIRST
|
||||||
- bit_offset: 10
|
|
||||||
bit_size: 1
|
|
||||||
description: SDMMC reset
|
|
||||||
name: SDMMCRST
|
|
||||||
- bit_offset: 24
|
|
||||||
bit_size: 1
|
|
||||||
description: DFSDM filter reset
|
|
||||||
name: DFSDMRST
|
|
||||||
fieldset/APB2SMENR:
|
fieldset/APB2SMENR:
|
||||||
description: APB2SMENR
|
description: APB2SMENR
|
||||||
fields:
|
fields:
|
||||||
@ -1100,6 +1096,10 @@ fieldset/APB2SMENR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: SYSCFG clocks enable during Sleep and Stop modes
|
description: SYSCFG clocks enable during Sleep and Stop modes
|
||||||
name: SYSCFGSMEN
|
name: SYSCFGSMEN
|
||||||
|
- bit_offset: 10
|
||||||
|
bit_size: 1
|
||||||
|
description: SDMMC clocks enable during Sleep and Stop modes
|
||||||
|
name: SDMMCSMEN
|
||||||
- bit_offset: 11
|
- bit_offset: 11
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: TIM1 timer clocks enable during Sleep and Stop modes
|
description: TIM1 timer clocks enable during Sleep and Stop modes
|
||||||
@ -1140,6 +1140,10 @@ fieldset/APB2SMENR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: DFSDM timer clocks enable during Sleep and Stop modes
|
description: DFSDM timer clocks enable during Sleep and Stop modes
|
||||||
name: DFSDM1SMEN
|
name: DFSDM1SMEN
|
||||||
|
- bit_offset: 24
|
||||||
|
bit_size: 1
|
||||||
|
description: DFSDM timer clocks enable during Sleep and Stop modes
|
||||||
|
name: DFSDMSMEN
|
||||||
- bit_offset: 26
|
- bit_offset: 26
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: LCD-TFT timer clocks enable during Sleep and Stop modes
|
description: LCD-TFT timer clocks enable during Sleep and Stop modes
|
||||||
@ -1148,14 +1152,6 @@ fieldset/APB2SMENR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: DSI clocks enable during Sleep and Stop modes
|
description: DSI clocks enable during Sleep and Stop modes
|
||||||
name: DSISMEN
|
name: DSISMEN
|
||||||
- bit_offset: 10
|
|
||||||
bit_size: 1
|
|
||||||
description: SDMMC clocks enable during Sleep and Stop modes
|
|
||||||
name: SDMMCSMEN
|
|
||||||
- bit_offset: 24
|
|
||||||
bit_size: 1
|
|
||||||
description: DFSDM timer clocks enable during Sleep and Stop modes
|
|
||||||
name: DFSDMSMEN
|
|
||||||
fieldset/BDCR:
|
fieldset/BDCR:
|
||||||
description: BDCR
|
description: BDCR
|
||||||
fields:
|
fields:
|
||||||
@ -1222,6 +1218,10 @@ fieldset/CCIPR:
|
|||||||
bit_size: 2
|
bit_size: 2
|
||||||
description: UART4 clock source selection
|
description: UART4 clock source selection
|
||||||
name: UART4SEL
|
name: UART4SEL
|
||||||
|
- bit_offset: 6
|
||||||
|
bit_size: 2
|
||||||
|
description: USART4 clock source selection
|
||||||
|
name: USART4SEL
|
||||||
- bit_offset: 8
|
- bit_offset: 8
|
||||||
bit_size: 2
|
bit_size: 2
|
||||||
description: UART5 clock source selection
|
description: UART5 clock source selection
|
||||||
@ -1266,10 +1266,6 @@ fieldset/CCIPR:
|
|||||||
bit_size: 2
|
bit_size: 2
|
||||||
description: ADCs clock source selection
|
description: ADCs clock source selection
|
||||||
name: ADCSEL
|
name: ADCSEL
|
||||||
- bit_offset: 6
|
|
||||||
bit_size: 2
|
|
||||||
description: USART4 clock source selection
|
|
||||||
name: USART4SEL
|
|
||||||
- bit_offset: 30
|
- bit_offset: 30
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: SWPMI1 clock source selection
|
description: SWPMI1 clock source selection
|
||||||
@ -1607,6 +1603,10 @@ fieldset/CSR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Firewall reset flag
|
description: Firewall reset flag
|
||||||
name: FWRSTF
|
name: FWRSTF
|
||||||
|
- bit_offset: 24
|
||||||
|
bit_size: 1
|
||||||
|
description: Firewall reset flag
|
||||||
|
name: FIREWALLRSTF
|
||||||
- bit_offset: 25
|
- bit_offset: 25
|
||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Option byte loader reset flag
|
description: Option byte loader reset flag
|
||||||
@ -1635,10 +1635,6 @@ fieldset/CSR:
|
|||||||
bit_size: 1
|
bit_size: 1
|
||||||
description: Low-power reset flag
|
description: Low-power reset flag
|
||||||
name: LPWRSTF
|
name: LPWRSTF
|
||||||
- bit_offset: 24
|
|
||||||
bit_size: 1
|
|
||||||
description: Firewall reset flag
|
|
||||||
name: FIREWALLRSTF
|
|
||||||
fieldset/ICSCR:
|
fieldset/ICSCR:
|
||||||
description: Internal clock sources calibration register
|
description: Internal clock sources calibration register
|
||||||
fields:
|
fields:
|
||||||
|
@ -21,6 +21,7 @@ def merge_block(origin, new):
|
|||||||
found = True
|
found = True
|
||||||
if not found:
|
if not found:
|
||||||
origin.append(newval)
|
origin.append(newval)
|
||||||
|
origin.sort(key=item_key)
|
||||||
|
|
||||||
def merge_fields(origin, new):
|
def merge_fields(origin, new):
|
||||||
for newval in new:
|
for newval in new:
|
||||||
@ -30,6 +31,7 @@ def merge_fields(origin, new):
|
|||||||
found = True
|
found = True
|
||||||
if not found:
|
if not found:
|
||||||
origin.append(newval)
|
origin.append(newval)
|
||||||
|
origin.sort(key=field_key)
|
||||||
|
|
||||||
def merge_dicts(origin, new):
|
def merge_dicts(origin, new):
|
||||||
for k, v in new.items():
|
for k, v in new.items():
|
||||||
|
Loading…
x
Reference in New Issue
Block a user