diff --git a/data/registers/rcc_l4.yaml b/data/registers/rcc_l4.yaml
index a66a83a..86b66ca 100644
--- a/data/registers/rcc_l4.yaml
+++ b/data/registers/rcc_l4.yaml
@@ -240,10 +240,6 @@ fieldset/AHB1RSTR:
     bit_size: 1
     description: GFXMMU reset
     name: GFXMMURST
-  - bit_offset: 11
-    bit_size: 1
-    description: CRC reset
-    name: CRCRST
 fieldset/AHB1SMENR:
   description: AHB1 peripheral clocks enable in Sleep and Stop modes register
   fields:
@@ -342,6 +338,10 @@ fieldset/AHB2ENR:
     bit_size: 1
     description: HASH clock enable
     name: HASHEN
+  - bit_offset: 17
+    bit_size: 1
+    description: HASH clock enable
+    name: HASH1EN
   - bit_offset: 18
     bit_size: 1
     description: Random Number Generator clock enable
@@ -354,10 +354,6 @@ fieldset/AHB2ENR:
     bit_size: 1
     description: SDMMC1 clock enable
     name: SDMMC1EN
-  - bit_offset: 17
-    bit_size: 1
-    description: HASH clock enable
-    name: HASH1EN
 fieldset/AHB2RSTR:
   description: AHB2 peripheral reset register
   fields:
@@ -417,6 +413,10 @@ fieldset/AHB2RSTR:
     bit_size: 1
     description: Hash reset
     name: HASHRST
+  - bit_offset: 17
+    bit_size: 1
+    description: Hash reset
+    name: HASH1RST
   - bit_offset: 18
     bit_size: 1
     description: Random number generator reset
@@ -429,10 +429,6 @@ fieldset/AHB2RSTR:
     bit_size: 1
     description: SDMMC1 reset
     name: SDMMC1RST
-  - bit_offset: 17
-    bit_size: 1
-    description: Hash reset
-    name: HASH1RST
 fieldset/AHB2SMENR:
   description: AHB2 peripheral clocks enable in Sleep and Stop modes register
   fields:
@@ -500,6 +496,10 @@ fieldset/AHB2SMENR:
     bit_size: 1
     description: HASH clock enable during Sleep and Stop modes
     name: HASHSMEN
+  - bit_offset: 17
+    bit_size: 1
+    description: HASH clock enable during Sleep and Stop modes
+    name: HASH1SMEN
   - bit_offset: 18
     bit_size: 1
     description: Random Number Generator clocks enable during Sleep and Stop modes
@@ -512,10 +512,6 @@ fieldset/AHB2SMENR:
     bit_size: 1
     description: SDMMC1 clocks enable during Sleep and Stop modes
     name: SDMMC1SMEN
-  - bit_offset: 17
-    bit_size: 1
-    description: HASH clock enable during Sleep and Stop modes
-    name: HASH1SMEN
 fieldset/AHB3ENR:
   description: AHB3 peripheral clock enable register
   fields:
@@ -523,14 +519,14 @@ fieldset/AHB3ENR:
     bit_size: 1
     description: Flexible memory controller clock enable
     name: FMCEN
-  - bit_offset: 9
-    bit_size: 1
-    description: OSPI2EN memory interface clock enable
-    name: OSPI2EN
   - bit_offset: 8
     bit_size: 1
     description: QSPIEN
     name: QSPIEN
+  - bit_offset: 9
+    bit_size: 1
+    description: OSPI2EN memory interface clock enable
+    name: OSPI2EN
 fieldset/AHB3RSTR:
   description: AHB3 peripheral reset register
   fields:
@@ -538,14 +534,14 @@ fieldset/AHB3RSTR:
     bit_size: 1
     description: Flexible memory controller reset
     name: FMCRST
-  - bit_offset: 9
-    bit_size: 1
-    description: OctOSPI2 memory interface reset
-    name: OSPI2RST
   - bit_offset: 8
     bit_size: 1
     description: Quad SPI memory interface reset
     name: QSPIRST
+  - bit_offset: 9
+    bit_size: 1
+    description: OctOSPI2 memory interface reset
+    name: OSPI2RST
 fieldset/AHB3SMENR:
   description: AHB3 peripheral clocks enable in Sleep and Stop modes register
   fields:
@@ -553,14 +549,14 @@ fieldset/AHB3SMENR:
     bit_size: 1
     description: Flexible memory controller clocks enable during Sleep and Stop modes
     name: FMCSMEN
-  - bit_offset: 9
-    bit_size: 1
-    description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
-    name: OCTOSPI2
   - bit_offset: 8
     bit_size: 1
     description: QSPISMEN
     name: QSPISMEN
+  - bit_offset: 9
+    bit_size: 1
+    description: OctoSPI2 memory interface clocks enable during Sleep and Stop modes
+    name: OCTOSPI2
 fieldset/APB1ENR1:
   description: APB1ENR1
   fields:
@@ -588,6 +584,10 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: TIM7 timer clock enable
     name: TIM7EN
+  - bit_offset: 9
+    bit_size: 1
+    description: LCD clock enable
+    name: LCDEN
   - bit_offset: 10
     bit_size: 1
     description: RTC APB clock enable
@@ -604,6 +604,10 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: SPI peripheral 3 clock enable
     name: SPI3EN
+  - bit_offset: 15
+    bit_size: 1
+    description: SPI3 clock enable
+    name: SP3EN
   - bit_offset: 17
     bit_size: 1
     description: USART2 clock enable
@@ -612,6 +616,10 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: USART3 clock enable
     name: USART3EN
+  - bit_offset: 18
+    bit_size: 1
+    description: USART1 clock enable
+    name: USART1EN
   - bit_offset: 19
     bit_size: 1
     description: UART4 clock enable
@@ -640,6 +648,18 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: CAN1 clock enable
     name: CAN1EN
+  - bit_offset: 26
+    bit_size: 1
+    description: USB FS clock enable
+    name: USBF
+  - bit_offset: 26
+    bit_size: 1
+    description: USB FS clock enable
+    name: USBFSEN
+  - bit_offset: 26
+    bit_size: 1
+    description: CAN2 clock enable
+    name: CAN2EN
   - bit_offset: 28
     bit_size: 1
     description: Power interface clock enable
@@ -656,30 +676,6 @@ fieldset/APB1ENR1:
     bit_size: 1
     description: Low power timer 1 clock enable
     name: LPTIM1EN
-  - bit_offset: 9
-    bit_size: 1
-    description: LCD clock enable
-    name: LCDEN
-  - bit_offset: 18
-    bit_size: 1
-    description: USART1 clock enable
-    name: USART1EN
-  - bit_offset: 26
-    bit_size: 1
-    description: USB FS clock enable
-    name: USBF
-  - bit_offset: 26
-    bit_size: 1
-    description: USB FS clock enable
-    name: USBFSEN
-  - bit_offset: 15
-    bit_size: 1
-    description: SPI3 clock enable
-    name: SP3EN
-  - bit_offset: 26
-    bit_size: 1
-    description: CAN2 clock enable
-    name: CAN2EN
 fieldset/APB1ENR2:
   description: APB1 peripheral clock enable register 2
   fields:
@@ -691,14 +687,14 @@ fieldset/APB1ENR2:
     bit_size: 1
     description: I2C4 clock enable
     name: I2C4EN
-  - bit_offset: 5
-    bit_size: 1
-    description: LPTIM2EN
-    name: LPTIM2EN
   - bit_offset: 2
     bit_size: 1
     description: Single wire protocol clock enable
     name: SWPMI1EN
+  - bit_offset: 5
+    bit_size: 1
+    description: LPTIM2EN
+    name: LPTIM2EN
   - bit_offset: 24
     bit_size: 1
     description: DFSDMEN enable
@@ -730,6 +726,10 @@ fieldset/APB1RSTR1:
     bit_size: 1
     description: TIM7 timer reset
     name: TIM7RST
+  - bit_offset: 9
+    bit_size: 1
+    description: LCD interface reset
+    name: LCDRST
   - bit_offset: 14
     bit_size: 1
     description: SPI2 reset
@@ -750,6 +750,10 @@ fieldset/APB1RSTR1:
     bit_size: 1
     description: UART4 reset
     name: UART4RST
+  - bit_offset: 19
+    bit_size: 1
+    description: USART4 reset.
+    name: USART4RST
   - bit_offset: 20
     bit_size: 1
     description: UART5 reset
@@ -774,6 +778,14 @@ fieldset/APB1RSTR1:
     bit_size: 1
     description: CAN1 reset
     name: CAN1RST
+  - bit_offset: 26
+    bit_size: 1
+    description: USB FS reset
+    name: USBFSRST
+  - bit_offset: 26
+    bit_size: 1
+    description: CAN2 reset
+    name: CAN2RST
   - bit_offset: 28
     bit_size: 1
     description: Power interface reset
@@ -790,22 +802,6 @@ fieldset/APB1RSTR1:
     bit_size: 1
     description: Low Power Timer 1 reset
     name: LPTIM1RST
-  - bit_offset: 9
-    bit_size: 1
-    description: LCD interface reset
-    name: LCDRST
-  - bit_offset: 19
-    bit_size: 1
-    description: USART4 reset.
-    name: USART4RST
-  - bit_offset: 26
-    bit_size: 1
-    description: USB FS reset
-    name: USBFSRST
-  - bit_offset: 26
-    bit_size: 1
-    description: CAN2 reset
-    name: CAN2RST
 fieldset/APB1RSTR2:
   description: APB1 peripheral reset register 2
   fields:
@@ -817,14 +813,14 @@ fieldset/APB1RSTR2:
     bit_size: 1
     description: I2C4 reset
     name: I2C4RST
-  - bit_offset: 5
-    bit_size: 1
-    description: Low-power timer 2 reset
-    name: LPTIM2RST
   - bit_offset: 2
     bit_size: 1
     description: Single wire protocol reset
     name: SWPMI1RST
+  - bit_offset: 5
+    bit_size: 1
+    description: Low-power timer 2 reset
+    name: LPTIM2RST
 fieldset/APB1SMENR1:
   description: APB1SMENR1
   fields:
@@ -852,6 +848,10 @@ fieldset/APB1SMENR1:
     bit_size: 1
     description: TIM7 timer clocks enable during Sleep and Stop modes
     name: TIM7SMEN
+  - bit_offset: 9
+    bit_size: 1
+    description: LCD clocks enable during Sleep and Stop modes
+    name: LCDSMEN
   - bit_offset: 10
     bit_size: 1
     description: RTC APB clock enable during Sleep and Stop modes
@@ -872,6 +872,10 @@ fieldset/APB1SMENR1:
     bit_size: 1
     description: USART2 clocks enable during Sleep and Stop modes
     name: USART2SMEN
+  - bit_offset: 17
+    bit_size: 1
+    description: USART1 clocks enable during Sleep and Stop modes
+    name: USART1SMEN
   - bit_offset: 18
     bit_size: 1
     description: USART3 clocks enable during Sleep and Stop modes
@@ -880,6 +884,10 @@ fieldset/APB1SMENR1:
     bit_size: 1
     description: UART4 clocks enable during Sleep and Stop modes
     name: UART4SMEN
+  - bit_offset: 19
+    bit_size: 1
+    description: USART2 clocks enable during Sleep and Stop modes
+    name: USART4SMEN
   - bit_offset: 20
     bit_size: 1
     description: UART5 clocks enable during Sleep and Stop modes
@@ -904,6 +912,14 @@ fieldset/APB1SMENR1:
     bit_size: 1
     description: CAN1 clocks enable during Sleep and Stop modes
     name: CAN1SMEN
+  - bit_offset: 26
+    bit_size: 1
+    description: USB FS clock enable during Sleep and Stop modes
+    name: USBFSSMEN
+  - bit_offset: 26
+    bit_size: 1
+    description: CAN2 clocks enable during Sleep and Stop modes
+    name: CAN2SMEN
   - bit_offset: 28
     bit_size: 1
     description: Power interface clocks enable during Sleep and Stop modes
@@ -920,26 +936,6 @@ fieldset/APB1SMENR1:
     bit_size: 1
     description: Low power timer 1 clocks enable during Sleep and Stop modes
     name: LPTIM1SMEN
-  - bit_offset: 9
-    bit_size: 1
-    description: LCD clocks enable during Sleep and Stop modes
-    name: LCDSMEN
-  - bit_offset: 17
-    bit_size: 1
-    description: USART1 clocks enable during Sleep and Stop modes
-    name: USART1SMEN
-  - bit_offset: 18
-    bit_size: 1
-    description: USART2 clocks enable during Sleep and Stop modes
-    name: USART2SMEN
-  - bit_offset: 26
-    bit_size: 1
-    description: USB FS clock enable during Sleep and Stop modes
-    name: USBFSSMEN
-  - bit_offset: 26
-    bit_size: 1
-    description: CAN2 clocks enable during Sleep and Stop modes
-    name: CAN2SMEN
 fieldset/APB1SMENR2:
   description: APB1 peripheral clocks enable in Sleep and Stop modes register 2
   fields:
@@ -951,14 +947,14 @@ fieldset/APB1SMENR2:
     bit_size: 1
     description: I2C4 clocks enable during Sleep and Stop modes
     name: I2C4SMEN
-  - bit_offset: 5
-    bit_size: 1
-    description: LPTIM2SMEN
-    name: LPTIM2SMEN
   - bit_offset: 2
     bit_size: 1
     description: Single wire protocol clocks enable during Sleep and Stop modes
     name: SWPMI1SMEN
+  - bit_offset: 5
+    bit_size: 1
+    description: LPTIM2SMEN
+    name: LPTIM2SMEN
 fieldset/APB2ENR:
   description: APB2ENR
   fields:
@@ -970,6 +966,14 @@ fieldset/APB2ENR:
     bit_size: 1
     description: Firewall clock enable
     name: FWEN
+  - bit_offset: 7
+    bit_size: 1
+    description: Firewall clock enable
+    name: FIREWALLEN
+  - bit_offset: 10
+    bit_size: 1
+    description: SDMMC clock enable
+    name: SDMMCEN
   - bit_offset: 11
     bit_size: 1
     description: TIM1 timer clock enable
@@ -1010,6 +1014,10 @@ fieldset/APB2ENR:
     bit_size: 1
     description: DFSDM timer clock enable
     name: DFSDM1EN
+  - bit_offset: 24
+    bit_size: 1
+    description: DFSDM timer clock enable
+    name: DFSDMEN
   - bit_offset: 26
     bit_size: 1
     description: LCD-TFT clock enable
@@ -1018,18 +1026,6 @@ fieldset/APB2ENR:
     bit_size: 1
     description: DSI clock enable
     name: DSIEN
-  - bit_offset: 7
-    bit_size: 1
-    description: Firewall clock enable
-    name: FIREWALLEN
-  - bit_offset: 10
-    bit_size: 1
-    description: SDMMC clock enable
-    name: SDMMCEN
-  - bit_offset: 24
-    bit_size: 1
-    description: DFSDM timer clock enable
-    name: DFSDMEN
 fieldset/APB2RSTR:
   description: APB2 peripheral reset register
   fields:
@@ -1037,6 +1033,10 @@ fieldset/APB2RSTR:
     bit_size: 1
     description: System configuration (SYSCFG) reset
     name: SYSCFGRST
+  - bit_offset: 10
+    bit_size: 1
+    description: SDMMC reset
+    name: SDMMCRST
   - bit_offset: 11
     bit_size: 1
     description: TIM1 timer reset
@@ -1077,6 +1077,10 @@ fieldset/APB2RSTR:
     bit_size: 1
     description: Digital filters for sigma-delata modulators (DFSDM) reset
     name: DFSDM1RST
+  - bit_offset: 24
+    bit_size: 1
+    description: DFSDM filter reset
+    name: DFSDMRST
   - bit_offset: 26
     bit_size: 1
     description: LCD-TFT reset
@@ -1085,14 +1089,6 @@ fieldset/APB2RSTR:
     bit_size: 1
     description: DSI reset
     name: DSIRST
-  - bit_offset: 10
-    bit_size: 1
-    description: SDMMC reset
-    name: SDMMCRST
-  - bit_offset: 24
-    bit_size: 1
-    description: DFSDM filter reset
-    name: DFSDMRST
 fieldset/APB2SMENR:
   description: APB2SMENR
   fields:
@@ -1100,6 +1096,10 @@ fieldset/APB2SMENR:
     bit_size: 1
     description: SYSCFG clocks enable during Sleep and Stop modes
     name: SYSCFGSMEN
+  - bit_offset: 10
+    bit_size: 1
+    description: SDMMC clocks enable during Sleep and Stop modes
+    name: SDMMCSMEN
   - bit_offset: 11
     bit_size: 1
     description: TIM1 timer clocks enable during Sleep and Stop modes
@@ -1140,6 +1140,10 @@ fieldset/APB2SMENR:
     bit_size: 1
     description: DFSDM timer clocks enable during Sleep and Stop modes
     name: DFSDM1SMEN
+  - bit_offset: 24
+    bit_size: 1
+    description: DFSDM timer clocks enable during Sleep and Stop modes
+    name: DFSDMSMEN
   - bit_offset: 26
     bit_size: 1
     description: LCD-TFT timer clocks enable during Sleep and Stop modes
@@ -1148,14 +1152,6 @@ fieldset/APB2SMENR:
     bit_size: 1
     description: DSI clocks enable during Sleep and Stop modes
     name: DSISMEN
-  - bit_offset: 10
-    bit_size: 1
-    description: SDMMC clocks enable during Sleep and Stop modes
-    name: SDMMCSMEN
-  - bit_offset: 24
-    bit_size: 1
-    description: DFSDM timer clocks enable during Sleep and Stop modes
-    name: DFSDMSMEN
 fieldset/BDCR:
   description: BDCR
   fields:
@@ -1222,6 +1218,10 @@ fieldset/CCIPR:
     bit_size: 2
     description: UART4 clock source selection
     name: UART4SEL
+  - bit_offset: 6
+    bit_size: 2
+    description: USART4 clock source selection
+    name: USART4SEL
   - bit_offset: 8
     bit_size: 2
     description: UART5 clock source selection
@@ -1266,10 +1266,6 @@ fieldset/CCIPR:
     bit_size: 2
     description: ADCs clock source selection
     name: ADCSEL
-  - bit_offset: 6
-    bit_size: 2
-    description: USART4 clock source selection
-    name: USART4SEL
   - bit_offset: 30
     bit_size: 1
     description: SWPMI1 clock source selection
@@ -1607,6 +1603,10 @@ fieldset/CSR:
     bit_size: 1
     description: Firewall reset flag
     name: FWRSTF
+  - bit_offset: 24
+    bit_size: 1
+    description: Firewall reset flag
+    name: FIREWALLRSTF
   - bit_offset: 25
     bit_size: 1
     description: Option byte loader reset flag
@@ -1635,10 +1635,6 @@ fieldset/CSR:
     bit_size: 1
     description: Low-power reset flag
     name: LPWRSTF
-  - bit_offset: 24
-    bit_size: 1
-    description: Firewall reset flag
-    name: FIREWALLRSTF
 fieldset/ICSCR:
   description: Internal clock sources calibration register
   fields:
diff --git a/merge_regs.py b/merge_regs.py
index bdb2f59..f8dbf58 100644
--- a/merge_regs.py
+++ b/merge_regs.py
@@ -21,6 +21,7 @@ def merge_block(origin, new):
                 found = True
         if not found:
             origin.append(newval)
+    origin.sort(key=item_key)
 
 def merge_fields(origin, new):
     for newval in new:
@@ -30,6 +31,7 @@ def merge_fields(origin, new):
                 found = True
         if not found:
             origin.append(newval)
+    origin.sort(key=field_key)
 
 def merge_dicts(origin, new):
     for k, v in new.items():