Generated from stm32-data d8716bffb5dee286c8337b3c4383fa78197de7d7

data/chips/STM32U5A5AJ.json

@@ -8326,6 +8326,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A5QI.json

@@ -7672,6 +7672,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A5QJ.json

@@ -7766,6 +7766,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A5RJ.json

@@ -5764,6 +5764,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A5VJ.json

@@ -7121,6 +7121,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A5ZJ.json

@@ -7910,6 +7910,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A9BJ.json

@@ -8767,6 +8767,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A9NJ.json

@@ -8822,6 +8822,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A9VJ.json

@@ -7216,6 +7216,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

data/chips/STM32U5A9ZJ.json

@@ -8184,6 +8184,11 @@
                 {
                     "name": "USB_OTG_HS",
                     "address": 1107558400,
+                    "registers": {
+                        "kind": "otg",
+                        "version": "v2",
+                        "block": "OTG"
+                    },
                     "rcc": {
                         "bus_clock": "HCLK2",
                         "kernel_clock": {

stm32-metapac/src/chips/metadata_0751.rs

@@ -11897,7 +11897,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -12707,6 +12714,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0752.rs

@@ -10987,7 +10987,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -11797,6 +11804,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0753.rs

@@ -11113,7 +11113,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -11923,6 +11930,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0754.rs

@@ -8321,7 +8321,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -9131,6 +9138,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0755.rs

@@ -10213,7 +10213,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -11023,6 +11030,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0756.rs

@@ -11309,7 +11309,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -12119,6 +12126,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0757.rs

@@ -12529,7 +12529,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -13369,6 +13376,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0758.rs

@@ -12606,7 +12606,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -13446,6 +13453,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0759.rs

@@ -10367,7 +10367,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -11207,6 +11214,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;

stm32-metapac/src/chips/metadata_0760.rs

@@ -11707,7 +11707,14 @@
     Peripheral {
         name: "USB_OTG_HS",
         address: 0x42040000,
-        registers: None,
+        registers: Some(
+            PeripheralRegisters {
+                kind: "otg",
+                version: "v2",
+                block: "OTG",
+                ir: &otg::REGISTERS,
+            },
+        ),
         rcc: Some(
             PeripheralRcc {
                 bus_clock: "HCLK2",
@@ -12547,6 +12554,7 @@
 #[path="../registers/octospi_v1.rs"] pub mod octospi;
 #[path="../registers/octospim_v1.rs"] pub mod octospim;
 #[path="../registers/otfdec_v1.rs"] pub mod otfdec;
+#[path="../registers/otg_v2.rs"] pub mod otg;
 #[path="../registers/pka_v1b.rs"] pub mod pka;
 #[path="../registers/pssi_v1.rs"] pub mod pssi;
 #[path="../registers/pwr_u5.rs"] pub mod pwr;