#include <stdint.h>

typedef struct {
    uint32_t  enc       : 1;  // 0	 Encryption mode bit
    uint32_t  reserve0  : 31; // 1    Reserve
} reg_otfdec_cr_t;

typedef struct {
    uint32_t  priv      : 1;  // 0	 Encryption mode bit
    uint32_t  reserve0  : 31; // 1    Reserve
} reg_otfdec_privcfgr_t;

typedef struct {
    uint32_t  reg_en    : 1;  // 0	 region on-the-fly decryption enable
    uint32_t  configlock: 1;  // 1	 region config lock
    uint32_t  keylock   : 1;  // 2	 region key lock
    uint32_t  reserve0  : 1; // 3    Reserve
    uint32_t  mode      : 2;  // 4	 operating mode
    uint32_t  reserve1  : 2; // 6    Reserve
    uint32_t  keycrc    : 8;  // 8	 region key 8-bit CRC
    uint32_t  regx_version: 16; // 16	 region firmware version
} reg_otfdec_r1cfgr_t;

typedef struct {
    uint32_t  reg_en    : 1;  // 0	 region on-the-fly decryption enable
    uint32_t  configlock: 1;  // 1	 region config lock
    uint32_t  keylock   : 1;  // 2	 region key lock
    uint32_t  reserve0  : 1; // 3    Reserve
    uint32_t  mode      : 2;  // 4	 operating mode
    uint32_t  reserve1  : 2; // 6    Reserve
    uint32_t  keycrc    : 8;  // 8	 region key 8-bit CRC
    uint32_t  regx_version: 16; // 16	 region firmware version
} reg_otfdec_r2cfgr_t;

typedef struct {
    uint32_t  reg_en    : 1;  // 0	 region on-the-fly decryption enable
    uint32_t  configlock: 1;  // 1	 region config lock
    uint32_t  keylock   : 1;  // 2	 region key lock
    uint32_t  reserve0  : 1; // 3    Reserve
    uint32_t  mode      : 2;  // 4	 operating mode
    uint32_t  reserve1  : 2; // 6    Reserve
    uint32_t  keycrc    : 8;  // 8	 region key 8-bit CRC
    uint32_t  regx_version: 16; // 16	 region firmware version
} reg_otfdec_r3cfgr_t;

typedef struct {
    uint32_t  reg_en    : 1;  // 0	 region on-the-fly decryption enable
    uint32_t  configlock: 1;  // 1	 region config lock
    uint32_t  keylock   : 1;  // 2	 region key lock
    uint32_t  reserve0  : 1; // 3    Reserve
    uint32_t  mode      : 2;  // 4	 operating mode
    uint32_t  reserve1  : 2; // 6    Reserve
    uint32_t  keycrc    : 8;  // 8	 region key 8-bit CRC
    uint32_t  regx_version: 16; // 16	 region firmware version
} reg_otfdec_r4cfgr_t;

typedef struct {
    uint32_t  regx_start_addr: 32; // 0	 Region AXI start address
} reg_otfdec_r1startaddr_t;

typedef struct {
    uint32_t  regx_start_addr: 32; // 0	 Region AXI start address
} reg_otfdec_r2startaddr_t;

typedef struct {
    uint32_t  regx_start_addr: 32; // 0	 Region AXI start address
} reg_otfdec_r3startaddr_t;

typedef struct {
    uint32_t  regx_start_addr: 32; // 0	 Region AXI start address
} reg_otfdec_r4startaddr_t;

typedef struct {
    uint32_t  regx_end_addr: 32; // 0	 Region AXI end address
} reg_otfdec_r1endaddr_t;

typedef struct {
    uint32_t  regx_end_addr: 32; // 0	 Region AXI end address
} reg_otfdec_r2endaddr_t;

typedef struct {
    uint32_t  regx_end_addr: 32; // 0	 Region AXI end address
} reg_otfdec_r3endaddr_t;

typedef struct {
    uint32_t  regx_end_addr: 32; // 0	 Region AXI end address
} reg_otfdec_r4endaddr_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 REGx_NONCE
} reg_otfdec_r1noncer0_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 REGx_NONCE
} reg_otfdec_r2noncer0_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 REGx_NONCE
} reg_otfdec_r3noncer0_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 REGx_NONCE
} reg_otfdec_r4noncer0_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 Region nonce
} reg_otfdec_r1noncer1_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 Region nonce, bits [63:32]REGx_NONCE[63:32]
} reg_otfdec_r2noncer1_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 REGx_NONCE
} reg_otfdec_r3noncer1_t;

typedef struct {
    uint32_t  regx_nonce: 32; // 0	 REGx_NONCE
} reg_otfdec_r4noncer1_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r1keyr0_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r2keyr0_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r3keyr0_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r4keyr0_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r1keyr1_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r2keyr1_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r3keyr1_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r4keyr1_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r1keyr2_t;

typedef struct {
    uint32_t  regx_key_ : 32; // 0	 REGx_KEY
} reg_otfdec_r2keyr2_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r3keyr2_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r4keyr2_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r1keyr3_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r2keyr3_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r3keyr3_t;

typedef struct {
    uint32_t  regx_key  : 32; // 0	 REGx_KEY
} reg_otfdec_r4keyr3_t;

typedef struct {
    uint32_t  seif      : 1;  // 0	 Security Error Interrupt Flag status
    uint32_t  xoneif    : 1;  // 1	 Execute-only execute-Never Error Interrupt Flag status
    uint32_t  keif      : 1;  // 2	 Key Error Interrupt Flag status
    uint32_t  reserve0  : 29; // 3    Reserve
} reg_otfdec_isr_t;

typedef struct {
    uint32_t  seif      : 1;  // 0	 SEIF
    uint32_t  xoneif    : 1;  // 1	 Execute-only execute-Never Error Interrupt Flag clear
    uint32_t  keif      : 1;  // 2	 KEIF
    uint32_t  reserve0  : 29; // 3    Reserve
} reg_otfdec_icr_t;

typedef struct {
    uint32_t  seie      : 1;  // 0	 Security Error Interrupt Enable
    uint32_t  xoneie    : 1;  // 1	 XONEIE
    uint32_t  keie      : 1;  // 2	 KEIE
    uint32_t  reserve0  : 29; // 3    Reserve
} reg_otfdec_ier_t;

typedef struct {
    volatile reg_otfdec_cr_t cr;
    volatile uint32_t reserve0[3];
    volatile reg_otfdec_privcfgr_t privcfgr;
    volatile uint32_t reserve1[3];
    volatile reg_otfdec_r1cfgr_t r1cfgr;
    volatile uint32_t reserve2[11];
    volatile reg_otfdec_r2cfgr_t r2cfgr;
    volatile uint32_t reserve3[11];
    volatile reg_otfdec_r3cfgr_t r3cfgr;
    volatile uint32_t reserve4[11];
    volatile reg_otfdec_r4cfgr_t r4cfgr;
    volatile uint32_t reserve5[-36];
    volatile reg_otfdec_r1startaddr_t r1startaddr;
    volatile uint32_t reserve6[11];
    volatile reg_otfdec_r2startaddr_t r2startaddr;
    volatile uint32_t reserve7[11];
    volatile reg_otfdec_r3startaddr_t r3startaddr;
    volatile uint32_t reserve8[11];
    volatile reg_otfdec_r4startaddr_t r4startaddr;
    volatile uint32_t reserve9[-36];
    volatile reg_otfdec_r1endaddr_t r1endaddr;
    volatile uint32_t reserve10[11];
    volatile reg_otfdec_r2endaddr_t r2endaddr;
    volatile uint32_t reserve11[11];
    volatile reg_otfdec_r3endaddr_t r3endaddr;
    volatile reg_otfdec_r4endaddr_t r4endaddr;
    volatile uint32_t reserve12[-25];
    volatile reg_otfdec_r1noncer0_t r1noncer0;
    volatile uint32_t reserve13[11];
    volatile reg_otfdec_r2noncer0_t r2noncer0;
    volatile uint32_t reserve14[11];
    volatile reg_otfdec_r3noncer0_t r3noncer0;
    volatile uint32_t reserve15[11];
    volatile reg_otfdec_r4noncer0_t r4noncer0;
    volatile uint32_t reserve16[-36];
    volatile reg_otfdec_r1noncer1_t r1noncer1;
    volatile uint32_t reserve17[11];
    volatile reg_otfdec_r2noncer1_t r2noncer1;
    volatile uint32_t reserve18[11];
    volatile reg_otfdec_r3noncer1_t r3noncer1;
    volatile uint32_t reserve19[11];
    volatile reg_otfdec_r4noncer1_t r4noncer1;
    volatile uint32_t reserve20[-36];
    volatile reg_otfdec_r1keyr0_t r1keyr0;
    volatile uint32_t reserve21[11];
    volatile reg_otfdec_r2keyr0_t r2keyr0;
    volatile uint32_t reserve22[11];
    volatile reg_otfdec_r3keyr0_t r3keyr0;
    volatile uint32_t reserve23[11];
    volatile reg_otfdec_r4keyr0_t r4keyr0;
    volatile uint32_t reserve24[-36];
    volatile reg_otfdec_r1keyr1_t r1keyr1;
    volatile uint32_t reserve25[11];
    volatile reg_otfdec_r2keyr1_t r2keyr1;
    volatile uint32_t reserve26[11];
    volatile reg_otfdec_r3keyr1_t r3keyr1;
    volatile uint32_t reserve27[11];
    volatile reg_otfdec_r4keyr1_t r4keyr1;
    volatile uint32_t reserve28[-36];
    volatile reg_otfdec_r1keyr2_t r1keyr2;
    volatile uint32_t reserve29[11];
    volatile reg_otfdec_r2keyr2_t r2keyr2;
    volatile uint32_t reserve30[11];
    volatile reg_otfdec_r3keyr2_t r3keyr2;
    volatile uint32_t reserve31[11];
    volatile reg_otfdec_r4keyr2_t r4keyr2;
    volatile uint32_t reserve32[-36];
    volatile reg_otfdec_r1keyr3_t r1keyr3;
    volatile uint32_t reserve33[11];
    volatile reg_otfdec_r2keyr3_t r2keyr3;
    volatile uint32_t reserve34[11];
    volatile reg_otfdec_r3keyr3_t r3keyr3;
    volatile uint32_t reserve35[11];
    volatile reg_otfdec_r4keyr3_t r4keyr3;
    volatile uint32_t reserve36[139];
    volatile reg_otfdec_isr_t isr;
    volatile reg_otfdec_icr_t icr;
    volatile reg_otfdec_ier_t ier;
} reg_otfdec_t;