#include <stdint.h>

typedef struct {
    uint32_t  x1_base   : 8;  // 0	 Base address of X1 buffer
    uint32_t  x1_buf_size: 8;  // 8	 Allocated size of X1 buffer in 16-bit words
    uint32_t  reserve0  : 8; // 16   Reserve
    uint32_t  full_wm   : 2;  // 24	 Watermark for buffer full flag
    uint32_t  reserve1  : 6;  // 26   Reserve
} reg_fmac_x1bufcfg_t;

typedef struct {
    uint32_t  x2_base   : 8;  // 0	 Base address of X2 buffer
    uint32_t  x2_buf_size: 8;  // 8	 Size of X2 buffer in 16-bit words
    uint32_t  reserve0  : 16; // 16   Reserve
} reg_fmac_x2bufcfg_t;

typedef struct {
    uint32_t  y_base    : 8;  // 0	 Base address of Y buffer
    uint32_t  y_buf_size: 8;  // 8	 Size of Y buffer in 16-bit words
    uint32_t  reserve0  : 8; // 16   Reserve
    uint32_t  empty_wm  : 2;  // 24	 Watermark for buffer empty flag
    uint32_t  reserve1  : 6;  // 26   Reserve
} reg_fmac_ybufcfg_t;

typedef struct {
    uint32_t  p         : 8;  // 0	 Input parameter P
    uint32_t  q         : 8;  // 8	 Input parameter Q
    uint32_t  r         : 8;  // 16	 Input parameter R
    uint32_t  func      : 7;  // 24	 Function
    uint32_t  start     : 1;  // 31	 Enable execution
} reg_fmac_param_t;

typedef struct {
    uint32_t  rien      : 1;  // 0	 Enable read interrupt
    uint32_t  wien      : 1;  // 1	 Enable write interrupt
    uint32_t  ovflien   : 1;  // 2	 Enable overflow error interrupts
    uint32_t  unflien   : 1;  // 3	 Enable underflow error interrupts
    uint32_t  satien    : 1;  // 4	 Enable saturation error interrupts
    uint32_t  reserve0  : 3; // 5    Reserve
    uint32_t  dmaren    : 1;  // 8	 Enable DMA read channel requests
    uint32_t  dmawen    : 1;  // 9	 Enable DMA write channel requests
    uint32_t  reserve1  : 5; // 10   Reserve
    uint32_t  clipen    : 1;  // 15	 Enable clipping
    uint32_t  reset     : 1;  // 16	 Reset FMAC unit
    uint32_t  reserve2  : 15; // 17   Reserve
} reg_fmac_cr_t;

typedef struct {
    uint32_t  yempty    : 1;  // 0	 Y buffer empty flag
    uint32_t  x1full    : 1;  // 1	 X1 buffer full flag
    uint32_t  reserve0  : 6; // 2    Reserve
    uint32_t  ovfl      : 1;  // 8	 Overflow error flag
    uint32_t  unfl      : 1;  // 9	 Underflow error flag
    uint32_t  sat       : 1;  // 10	 Saturation error flag
    uint32_t  reserve1  : 21; // 11   Reserve
} reg_fmac_sr_t;

typedef struct {
    uint32_t  wdata     : 16; // 0	 Write data
    uint32_t  reserve0  : 16; // 16   Reserve
} reg_fmac_wdata_t;

typedef struct {
    uint32_t  rdata     : 16; // 0	 Read data
    uint32_t  reserve0  : 16; // 16   Reserve
} reg_fmac_rdata_t;

typedef struct {
    volatile reg_fmac_x1bufcfg_t x1bufcfg;
    volatile reg_fmac_x2bufcfg_t x2bufcfg;
    volatile reg_fmac_ybufcfg_t ybufcfg;
    volatile reg_fmac_param_t param;
    volatile reg_fmac_cr_t cr;
    volatile reg_fmac_sr_t sr;
    volatile reg_fmac_wdata_t wdata;
    volatile reg_fmac_rdata_t rdata;
} reg_fmac_t;