#include typedef struct { uint32_t opaen : 1; // 0 Operational amplifier Enable uint32_t opalpm : 1; // 1 OPALPM uint32_t opamode : 2; // 2 OPAMODE uint32_t pga_gain : 2; // 4 USERTRIM uint32_t reserve0 : 2; // 6 Reserve uint32_t vm_sel : 2; // 8 VM_SEL uint32_t vp_sel : 1; // 10 VP_SEL uint32_t reserve1 : 1; // 11 Reserve uint32_t calon : 1; // 12 CALON uint32_t calsel : 1; // 13 CALSEL uint32_t usertrim : 1; // 14 USERTRIM uint32_t calout : 1; // 15 CALOUT uint32_t reserve2 : 14; // 16 Reserve uint32_t opahsm : 1; // 30 OPAHSM uint32_t reserve3 : 1; // 31 Reserve } reg_sec_opamp_opamp1_csr_t; typedef struct { uint32_t trimoffsetn: 5; // 0 TRIMOFFSETN uint32_t reserve0 : 3; // 5 Reserve uint32_t trimoffsetp: 5; // 8 TRIMOFFSETP uint32_t reserve1 : 19; // 13 Reserve } reg_sec_opamp_opamp1_otr_t; typedef struct { uint32_t trimlpoffsetn: 5; // 0 TRIMLPOFFSETN uint32_t reserve0 : 3; // 5 Reserve uint32_t trimlpoffsetp: 5; // 8 TRIMLPOFFSETP uint32_t reserve1 : 19; // 13 Reserve } reg_sec_opamp_opamp1_lpotr_t; typedef struct { uint32_t opaen : 1; // 0 OPAEN uint32_t opalpm : 1; // 1 OPALPM uint32_t opamode : 2; // 2 OPAMODE uint32_t pga_gain : 2; // 4 PGA_GAIN uint32_t reserve0 : 2; // 6 Reserve uint32_t vm_sel : 2; // 8 VM_SEL uint32_t vp_sel : 1; // 10 VP_SEL uint32_t reserve1 : 1; // 11 Reserve uint32_t calon : 1; // 12 CALON uint32_t calsel : 1; // 13 CALSEL uint32_t usertrim : 1; // 14 USERTRIM uint32_t calout : 1; // 15 CALOUT uint32_t reserve2 : 14; // 16 Reserve uint32_t opahsm : 1; // 30 OPAHSM uint32_t reserve3 : 1; // 31 Reserve } reg_sec_opamp_opamp2_crs_t; typedef struct { uint32_t trimoffsetn: 5; // 0 TRIMOFFSETN uint32_t reserve0 : 3; // 5 Reserve uint32_t trimoffsetp: 5; // 8 TRIMOFFSETP uint32_t reserve1 : 19; // 13 Reserve } reg_sec_opamp_opamp2_otr_t; typedef struct { uint32_t trimlpoffsetn: 5; // 0 TRIMLPOFFSETN uint32_t reserve0 : 3; // 5 Reserve uint32_t trimlpoffsetp: 5; // 8 TRIMLPOFFSETP uint32_t reserve1 : 19; // 13 Reserve } reg_sec_opamp_opamp2_lpotr_t; typedef struct { volatile reg_sec_opamp_opamp1_csr_t opamp1_csr; volatile reg_sec_opamp_opamp1_otr_t opamp1_otr; volatile reg_sec_opamp_opamp1_lpotr_t opamp1_lpotr; volatile uint32_t reserve0[1]; volatile reg_sec_opamp_opamp2_crs_t opamp2_crs; volatile reg_sec_opamp_opamp2_otr_t opamp2_otr; volatile reg_sec_opamp_opamp2_lpotr_t opamp2_lpotr; } reg_sec_opamp_t;