#include <stdint.h>

typedef struct {
    uint32_t  reserve0  : 2; // 0    Reserve
    uint32_t  init      : 1;  // 2	 Initialize message digest calculation
    uint32_t  dmae      : 1;  // 3	 DMA enable
    uint32_t  datatype  : 2;  // 4	 Data type selection
    uint32_t  mode      : 1;  // 6	 Mode selection
    uint32_t  reserve1  : 1; // 7    Reserve
    uint32_t  nbw       : 4;  // 8	 Number of words already pushed
    uint32_t  dinne     : 1;  // 12	 DIN not empty
    uint32_t  mdmat     : 1;  // 13	 Multiple DMA Transfers
    uint32_t  reserve2  : 2; // 14   Reserve
    uint32_t  lkey      : 1;  // 16	 Long key selection
    uint32_t  algo      : 2;  // 17	 Algorithm selection
    uint32_t  reserve3  : 13; // 19   Reserve
} reg_hash_cr_t;

typedef struct {
    uint32_t  datain    : 32; // 0	 Data input
} reg_hash_din_t;

typedef struct {
    uint32_t  nblw      : 5;  // 0	 Number of valid bits in the last word of the message
    uint32_t  reserve0  : 3; // 5    Reserve
    uint32_t  dcal      : 1;  // 8	 Digest calculation
    uint32_t  reserve1  : 23; // 9    Reserve
} reg_hash_str_t;

typedef struct {
    uint32_t  h0        : 32; // 0	 H0
} reg_hash_hra0_t;

typedef struct {
    uint32_t  h1        : 32; // 0	 H1
} reg_hash_hra1_t;

typedef struct {
    uint32_t  h2        : 32; // 0	 H2
} reg_hash_hra2_t;

typedef struct {
    uint32_t  h3        : 32; // 0	 H3
} reg_hash_hra3_t;

typedef struct {
    uint32_t  h4        : 32; // 0	 H4
} reg_hash_hra4_t;

typedef struct {
    uint32_t  h0        : 32; // 0	 H0
} reg_hash_hr0_t;

typedef struct {
    uint32_t  h1        : 32; // 0	 H1
} reg_hash_hr1_t;

typedef struct {
    uint32_t  h2        : 32; // 0	 H2
} reg_hash_hr2_t;

typedef struct {
    uint32_t  h3        : 32; // 0	 H3
} reg_hash_hr3_t;

typedef struct {
    uint32_t  h4        : 32; // 0	 H4
} reg_hash_hr4_t;

typedef struct {
    uint32_t  h5        : 32; // 0	 H5
} reg_hash_hr5_t;

typedef struct {
    uint32_t  h6        : 32; // 0	 H6
} reg_hash_hr6_t;

typedef struct {
    uint32_t  h7        : 32; // 0	 H7
} reg_hash_hr7_t;

typedef struct {
    uint32_t  dinie     : 1;  // 0	 Data input interrupt enable
    uint32_t  dcie      : 1;  // 1	 Digest calculation completion interrupt enable
    uint32_t  reserve0  : 30; // 2    Reserve
} reg_hash_imr_t;

typedef struct {
    uint32_t  dinis     : 1;  // 0	 Data input interrupt status
    uint32_t  dcis      : 1;  // 1	 Digest calculation completion interrupt status
    uint32_t  dmas      : 1;  // 2	 DMA Status
    uint32_t  busy      : 1;  // 3	 Busy bit
    uint32_t  reserve0  : 5; // 4    Reserve
    uint32_t  nbwp      : 5;  // 9	 Number of words already pushed
    uint32_t  reserve1  : 1; // 14   Reserve
    uint32_t  dinne     : 1;  // 15	 DIN not empty
    uint32_t  nbwe      : 5;  // 16	 Number of words expected
    uint32_t  reserve2  : 11; // 21   Reserve
} reg_hash_sr_t;

typedef struct {
    uint32_t  csr0      : 32; // 0	 CSR0
} reg_hash_csr0_t;

typedef struct {
    uint32_t  csr1      : 32; // 0	 CSR1
} reg_hash_csr1_t;

typedef struct {
    uint32_t  csr2      : 32; // 0	 CSR2
} reg_hash_csr2_t;

typedef struct {
    uint32_t  csr3      : 32; // 0	 CSR3
} reg_hash_csr3_t;

typedef struct {
    uint32_t  csr4      : 32; // 0	 CSR4
} reg_hash_csr4_t;

typedef struct {
    uint32_t  csr5      : 32; // 0	 CSR5
} reg_hash_csr5_t;

typedef struct {
    uint32_t  csr6      : 32; // 0	 CSR6
} reg_hash_csr6_t;

typedef struct {
    uint32_t  csr7      : 32; // 0	 CSR7
} reg_hash_csr7_t;

typedef struct {
    uint32_t  csr8      : 32; // 0	 CSR8
} reg_hash_csr8_t;

typedef struct {
    uint32_t  csr9      : 32; // 0	 CSR9
} reg_hash_csr9_t;

typedef struct {
    uint32_t  csr10     : 32; // 0	 CSR10
} reg_hash_csr10_t;

typedef struct {
    uint32_t  csr11     : 32; // 0	 CSR11
} reg_hash_csr11_t;

typedef struct {
    uint32_t  csr12     : 32; // 0	 CSR12
} reg_hash_csr12_t;

typedef struct {
    uint32_t  csr13     : 32; // 0	 CSR13
} reg_hash_csr13_t;

typedef struct {
    uint32_t  csr14     : 32; // 0	 CSR14
} reg_hash_csr14_t;

typedef struct {
    uint32_t  csr15     : 32; // 0	 CSR15
} reg_hash_csr15_t;

typedef struct {
    uint32_t  csr16     : 32; // 0	 CSR16
} reg_hash_csr16_t;

typedef struct {
    uint32_t  csr17     : 32; // 0	 CSR17
} reg_hash_csr17_t;

typedef struct {
    uint32_t  csr18     : 32; // 0	 CSR18
} reg_hash_csr18_t;

typedef struct {
    uint32_t  csr19     : 32; // 0	 CSR19
} reg_hash_csr19_t;

typedef struct {
    uint32_t  csr20     : 32; // 0	 CSR20
} reg_hash_csr20_t;

typedef struct {
    uint32_t  csr21     : 32; // 0	 CSR21
} reg_hash_csr21_t;

typedef struct {
    uint32_t  csr22     : 32; // 0	 CSR22
} reg_hash_csr22_t;

typedef struct {
    uint32_t  csr23     : 32; // 0	 CSR23
} reg_hash_csr23_t;

typedef struct {
    uint32_t  csr24     : 32; // 0	 CSR24
} reg_hash_csr24_t;

typedef struct {
    uint32_t  csr25     : 32; // 0	 CSR25
} reg_hash_csr25_t;

typedef struct {
    uint32_t  csr26     : 32; // 0	 CSR26
} reg_hash_csr26_t;

typedef struct {
    uint32_t  csr27     : 32; // 0	 CSR27
} reg_hash_csr27_t;

typedef struct {
    uint32_t  csr28     : 32; // 0	 CSR28
} reg_hash_csr28_t;

typedef struct {
    uint32_t  csr29     : 32; // 0	 CSR29
} reg_hash_csr29_t;

typedef struct {
    uint32_t  csr30     : 32; // 0	 CSR30
} reg_hash_csr30_t;

typedef struct {
    uint32_t  csr31     : 32; // 0	 CSR31
} reg_hash_csr31_t;

typedef struct {
    uint32_t  csr32     : 32; // 0	 CSR32
} reg_hash_csr32_t;

typedef struct {
    uint32_t  csr33     : 32; // 0	 CSR33
} reg_hash_csr33_t;

typedef struct {
    uint32_t  csr34     : 32; // 0	 CSR34
} reg_hash_csr34_t;

typedef struct {
    uint32_t  csr35     : 32; // 0	 CSR35
} reg_hash_csr35_t;

typedef struct {
    uint32_t  csr36     : 32; // 0	 CSR36
} reg_hash_csr36_t;

typedef struct {
    uint32_t  csr37     : 32; // 0	 CSR37
} reg_hash_csr37_t;

typedef struct {
    uint32_t  csr38     : 32; // 0	 CSR38
} reg_hash_csr38_t;

typedef struct {
    uint32_t  csr39     : 32; // 0	 CSR39
} reg_hash_csr39_t;

typedef struct {
    uint32_t  csr40     : 32; // 0	 CSR40
} reg_hash_csr40_t;

typedef struct {
    uint32_t  csr41     : 32; // 0	 CSR41
} reg_hash_csr41_t;

typedef struct {
    uint32_t  csr42     : 32; // 0	 CSR42
} reg_hash_csr42_t;

typedef struct {
    uint32_t  csr43     : 32; // 0	 CSR43
} reg_hash_csr43_t;

typedef struct {
    uint32_t  csr44     : 32; // 0	 CSR44
} reg_hash_csr44_t;

typedef struct {
    uint32_t  csr45     : 32; // 0	 CSR45
} reg_hash_csr45_t;

typedef struct {
    uint32_t  csr46     : 32; // 0	 CSR46
} reg_hash_csr46_t;

typedef struct {
    uint32_t  csr47     : 32; // 0	 CSR47
} reg_hash_csr47_t;

typedef struct {
    uint32_t  csr48     : 32; // 0	 CSR48
} reg_hash_csr48_t;

typedef struct {
    uint32_t  csr49     : 32; // 0	 CSR49
} reg_hash_csr49_t;

typedef struct {
    uint32_t  csr50     : 32; // 0	 CSR50
} reg_hash_csr50_t;

typedef struct {
    uint32_t  csr51     : 32; // 0	 CSR51
} reg_hash_csr51_t;

typedef struct {
    uint32_t  csr52     : 32; // 0	 CSR52
} reg_hash_csr52_t;

typedef struct {
    uint32_t  csr53     : 32; // 0	 CSR53
} reg_hash_csr53_t;

typedef struct {
    volatile reg_hash_cr_t cr;
    volatile reg_hash_din_t din;
    volatile reg_hash_str_t str;
    volatile reg_hash_hra0_t hra0;
    volatile reg_hash_hra1_t hra1;
    volatile reg_hash_hra2_t hra2;
    volatile reg_hash_hra3_t hra3;
    volatile reg_hash_hra4_t hra4;
    volatile uint32_t reserve0[188];
    volatile reg_hash_hr0_t hr0;
    volatile reg_hash_hr1_t hr1;
    volatile reg_hash_hr2_t hr2;
    volatile reg_hash_hr3_t hr3;
    volatile reg_hash_hr4_t hr4;
    volatile reg_hash_hr5_t hr5;
    volatile reg_hash_hr6_t hr6;
    volatile reg_hash_hr7_t hr7;
    volatile uint32_t reserve1[-196];
    volatile reg_hash_imr_t imr;
    volatile reg_hash_sr_t sr;
    volatile uint32_t reserve2[52];
    volatile reg_hash_csr0_t csr0;
    volatile reg_hash_csr1_t csr1;
    volatile reg_hash_csr2_t csr2;
    volatile reg_hash_csr3_t csr3;
    volatile reg_hash_csr4_t csr4;
    volatile reg_hash_csr5_t csr5;
    volatile reg_hash_csr6_t csr6;
    volatile reg_hash_csr7_t csr7;
    volatile reg_hash_csr8_t csr8;
    volatile reg_hash_csr9_t csr9;
    volatile reg_hash_csr10_t csr10;
    volatile reg_hash_csr11_t csr11;
    volatile reg_hash_csr12_t csr12;
    volatile reg_hash_csr13_t csr13;
    volatile reg_hash_csr14_t csr14;
    volatile reg_hash_csr15_t csr15;
    volatile reg_hash_csr16_t csr16;
    volatile reg_hash_csr17_t csr17;
    volatile reg_hash_csr18_t csr18;
    volatile reg_hash_csr19_t csr19;
    volatile reg_hash_csr20_t csr20;
    volatile reg_hash_csr21_t csr21;
    volatile reg_hash_csr22_t csr22;
    volatile reg_hash_csr23_t csr23;
    volatile reg_hash_csr24_t csr24;
    volatile reg_hash_csr25_t csr25;
    volatile reg_hash_csr26_t csr26;
    volatile reg_hash_csr27_t csr27;
    volatile reg_hash_csr28_t csr28;
    volatile reg_hash_csr29_t csr29;
    volatile reg_hash_csr30_t csr30;
    volatile reg_hash_csr31_t csr31;
    volatile reg_hash_csr32_t csr32;
    volatile reg_hash_csr33_t csr33;
    volatile reg_hash_csr34_t csr34;
    volatile reg_hash_csr35_t csr35;
    volatile reg_hash_csr36_t csr36;
    volatile reg_hash_csr37_t csr37;
    volatile reg_hash_csr38_t csr38;
    volatile reg_hash_csr39_t csr39;
    volatile reg_hash_csr40_t csr40;
    volatile reg_hash_csr41_t csr41;
    volatile reg_hash_csr42_t csr42;
    volatile reg_hash_csr43_t csr43;
    volatile reg_hash_csr44_t csr44;
    volatile reg_hash_csr45_t csr45;
    volatile reg_hash_csr46_t csr46;
    volatile reg_hash_csr47_t csr47;
    volatile reg_hash_csr48_t csr48;
    volatile reg_hash_csr49_t csr49;
    volatile reg_hash_csr50_t csr50;
    volatile reg_hash_csr51_t csr51;
    volatile reg_hash_csr52_t csr52;
    volatile reg_hash_csr53_t csr53;
} reg_hash_t;