#ifndef REG_NVIC_H
#define REG_NVIC_H
#include "stm32u5xx.h"

/// @brief enable uart interrupt
/// @param[in] uart: uart instance
static inline void nvic_enable_uart_irq(USART_TypeDef *uart) {
    if (uart == USART1) NVIC_EnableIRQ(USART1_IRQn);
    else if (uart == USART2) NVIC_EnableIRQ(USART2_IRQn);
    else if (uart == USART3) NVIC_EnableIRQ(USART3_IRQn);
    else if (uart == UART4) NVIC_EnableIRQ(UART4_IRQn);
    else if (uart == UART5) NVIC_EnableIRQ(UART5_IRQn);
}

/// @brief enable i2c interrupt
/// @param[in] i2c: i2c instance
static inline void nvic_enable_i2c_irq(I2C_TypeDef *i2c) {
    if (i2c == I2C1) {
        NVIC_EnableIRQ(I2C1_EV_IRQn);
        NVIC_EnableIRQ(I2C1_ER_IRQn);
    } else if (i2c == I2C2) {
        NVIC_EnableIRQ(I2C2_EV_IRQn);
        NVIC_EnableIRQ(I2C2_ER_IRQn);
    } else if (i2c == I2C3) {
        NVIC_EnableIRQ(I2C3_EV_IRQn);
        NVIC_EnableIRQ(I2C3_ER_IRQn);
    }
}

/// @brief enable dcmi interrupt
/// @param[in] dcmi: dcmi instance
static inline void nvic_enable_dcmi_irq(DCMI_TypeDef *dcmi) {
    NVIC_EnableIRQ(DCMI_PSSI_IRQn);
}

/// @brief enable dma interrupt
/// @param[in] dma: dma instance
static inline void nvic_enable_dma_irq(DMA_Channel_TypeDef *dma) {
    NVIC_EnableIRQ(GPDMA1_Channel0_IRQn);
}

static inline void nvic_enable_adc_irq(){
    NVIC_EnableIRQ(ADC1_IRQn);
}

#endif // REG_NVIC_H