#include <stdint.h>

typedef struct {
    uint32_t  en        : 1;  // 0	 SAES enable
    uint32_t  datatype  : 2;  // 1	 DATATYPE
    uint32_t  mode      : 2;  // 3	 MODE
    uint32_t  chmod     : 2;  // 5	 CHMOD
    uint32_t  reserve0  : 4; // 7    Reserve
    uint32_t  dmainen   : 1;  // 11	 DMAINEN
    uint32_t  dmaouten  : 1;  // 12	 DMAOUTEN
    uint32_t  reserve1  : 5; // 13   Reserve
    uint32_t  keysize   : 1;  // 18	 KEYSIZE
    uint32_t  keyprot   : 1;  // 19	 KEYPROT
    uint32_t  reserve2  : 4; // 20   Reserve
    uint32_t  kmod      : 2;  // 24	 KMOD
    uint32_t  kshareid  : 2;  // 26	 KSHAREID
    uint32_t  keysel    : 3;  // 28	 KEYSEL
    uint32_t  iprst     : 1;  // 31	 IPRST
} reg_sec_saes_cr_t;

typedef struct {
    uint32_t  ccf       : 1;  // 0	 Computation complete flag
    uint32_t  rderr     : 1;  // 1	 Read error flag
    uint32_t  wrerr     : 1;  // 2	 Write error flag
    uint32_t  busy      : 1;  // 3	 BUSY
    uint32_t  reserve0  : 3; // 4    Reserve
    uint32_t  keyvalid  : 1;  // 7	 Key Valid flag
    uint32_t  reserve1  : 24; // 8    Reserve
} reg_sec_saes_sr_t;

typedef struct {
    uint32_t  din       : 32; // 0	 Input data word
} reg_sec_saes_dinr_t;

typedef struct {
    uint32_t  dout      : 32; // 0	 Output data word
} reg_sec_saes_doutr_t;

typedef struct {
    uint32_t  key       : 32; // 0	 Cryptographic key, bits [31:0]
} reg_sec_saes_keyr0_t;

typedef struct {
    uint32_t  key       : 32; // 0	 Cryptographic key, bits [63:32]
} reg_sec_saes_keyr1_t;

typedef struct {
    uint32_t  keyr      : 32; // 0	 Cryptographic key, bits [95:64]
} reg_sec_saes_keyr2_t;

typedef struct {
    uint32_t  saes_keyr3: 32; // 0	 Cryptographic key, bits [127:96]
} reg_sec_saes_keyr3_t;

typedef struct {
    uint32_t  ivi       : 32; // 0	 Initialization vector input, bits [31:0]
} reg_sec_saes_ivr0_t;

typedef struct {
    uint32_t  ivi       : 32; // 0	 Initialization vector input, bits [63:32]
} reg_sec_saes_ivr1_t;

typedef struct {
    uint32_t  ivi       : 32; // 0	 Initialization vector input, bits [95:64]
} reg_sec_saes_ivr2_t;

typedef struct {
    uint32_t  ivi       : 32; // 0	 Initialization vector input, bits [127:96]
} reg_sec_saes_ivr3_t;

typedef struct {
    uint32_t  key       : 32; // 0	 Cryptographic key, bits [159:128]
} reg_sec_saes_keyr4_t;

typedef struct {
    uint32_t  key       : 32; // 0	 Cryptographic key, bits [191:160]
} reg_sec_saes_keyr5_t;

typedef struct {
    uint32_t  key       : 32; // 0	 Cryptographic key, bits [223:192]
} reg_sec_saes_keyr6_t;

typedef struct {
    uint32_t  key       : 32; // 0	 Cryptographic key, bits [255:224]
} reg_sec_saes_keyr7_t;

typedef struct {
    uint32_t  reserve0  : 1; // 0    Reserve
    uint32_t  redcfg    : 1;  // 1	 REDCFG
    uint32_t  reseed    : 1;  // 2	 RESEED
    uint32_t  trimcfg   : 2;  // 3	 TRIMCFG
    uint32_t  reserve1  : 26; // 5    Reserve
    uint32_t  configlock: 1;  // 31	 CONFIGLOCK
} reg_sec_saes_dpacfgr_t;

typedef struct {
    uint32_t  ccfie     : 1;  // 0	 Computation complete flag interrupt enable
    uint32_t  rweie     : 1;  // 1	 Read or write error interrupt enable
    uint32_t  keie      : 1;  // 2	 Key error interrupt enable
    uint32_t  rngeie    : 1;  // 3	 RNGEIE
    uint32_t  reserve0  : 28; // 4    Reserve
} reg_sec_saes_ier_t;

typedef struct {
    uint32_t  ccf       : 1;  // 0	 Computation complete flag
    uint32_t  rweif     : 1;  // 1	 Read or write error interrupt flag
    uint32_t  keif      : 1;  // 2	 Key error interrupt flag
    uint32_t  rngeif    : 1;  // 3	 RNGEIF
    uint32_t  reserve0  : 28; // 4    Reserve
} reg_sec_saes_isr_t;

typedef struct {
    uint32_t  ccf       : 1;  // 0	 Computation complete flag clear
    uint32_t  rweif     : 1;  // 1	 Read or write error interrupt flag clear
    uint32_t  keif      : 1;  // 2	 Key error interrupt flag clear
    uint32_t  rngeif    : 1;  // 3	 RNGEIF
    uint32_t  reserve0  : 28; // 4    Reserve
} reg_sec_saes_icr_t;

typedef struct {
    volatile reg_sec_saes_cr_t cr;
    volatile reg_sec_saes_sr_t sr;
    volatile reg_sec_saes_dinr_t dinr;
    volatile reg_sec_saes_doutr_t doutr;
    volatile reg_sec_saes_keyr0_t keyr0;
    volatile reg_sec_saes_keyr1_t keyr1;
    volatile reg_sec_saes_keyr2_t keyr2;
    volatile reg_sec_saes_keyr3_t keyr3;
    volatile reg_sec_saes_ivr0_t ivr0;
    volatile reg_sec_saes_ivr1_t ivr1;
    volatile reg_sec_saes_ivr2_t ivr2;
    volatile reg_sec_saes_ivr3_t ivr3;
    volatile reg_sec_saes_keyr4_t keyr4;
    volatile reg_sec_saes_keyr5_t keyr5;
    volatile reg_sec_saes_keyr6_t keyr6;
    volatile reg_sec_saes_keyr7_t keyr7;
    volatile uint32_t reserve0[48];
    volatile reg_sec_saes_dpacfgr_t dpacfgr;
    volatile uint32_t reserve1[127];
    volatile reg_sec_saes_ier_t ier;
    volatile reg_sec_saes_isr_t isr;
    volatile reg_sec_saes_icr_t icr;
} reg_sec_saes_t;