86 lines
1.8 KiB
YAML
86 lines
1.8 KiB
YAML
block/PWR:
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description: Power control
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items:
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- byte_offset: 0
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description: power control register
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fieldset: CR
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name: CR
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- byte_offset: 4
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description: power control/status register
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fieldset: CSR
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name: CSR
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enum/PDDS:
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bit_size: 1
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variants:
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- description: Enter Stop mode when the CPU enters deepsleep
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name: STOP_MODE
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value: 0
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- description: Enter Standby mode when the CPU enters deepsleep
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name: STANDBY_MODE
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value: 1
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fieldset/CR:
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description: power control register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Low-power deep sleep
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name: LPDS
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- bit_offset: 1
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bit_size: 1
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description: Power down deepsleep
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enum: PDDS
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name: PDDS
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- bit_offset: 2
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bit_size: 1
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description: Clear wakeup flag
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name: CWUF
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- bit_offset: 3
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bit_size: 1
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description: Clear standby flag
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name: CSBF
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- bit_offset: 4
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bit_size: 1
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description: Power voltage detector enable
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name: PVDE
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- bit_offset: 5
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bit_size: 3
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description: PVD level selection
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name: PLS
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- bit_offset: 8
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bit_size: 1
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description: Disable backup domain write protection
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name: DBP
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- array:
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len: 3
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stride: 1
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bit_offset: 9
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bit_size: 1
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description: ENable SD1 ADC
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name: ENSD
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fieldset/CSR:
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description: power control/status register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Wakeup flag
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name: WUF
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- bit_offset: 1
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bit_size: 1
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description: Standby flag
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name: SBF
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- bit_offset: 2
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bit_size: 1
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description: PVD output
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name: PVDO
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- bit_offset: 3
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bit_size: 1
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description: Internal voltage reference ready flag
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name: VREFINTRDYF
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- array:
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len: 2
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stride: 1
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bit_offset: 8
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bit_size: 1
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description: Enable WKUP1 pin
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name: EWUP
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