142 lines
3.8 KiB
YAML
142 lines
3.8 KiB
YAML
block/GFXMMU:
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description: GFXMMU.
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items:
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- name: CR
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description: GFXMMU configuration register.
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byte_offset: 0
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fieldset: CR
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- name: SR
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description: GFXMMU status register.
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byte_offset: 4
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access: Read
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fieldset: SR
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- name: FCR
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description: GFXMMU flag clear register.
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byte_offset: 8
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access: Write
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fieldset: FCR
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- name: DVR
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description: GFXMMU default value register.
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byte_offset: 16
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fieldset: DVR
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- name: BCR
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description: GFXMMU buffer 0 configuration register.
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array:
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len: 4
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stride: 4
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byte_offset: 32
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fieldset: BCR
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- name: LUTL
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description: GFXMMU LUT entry 0 low.
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array:
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len: 1024
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stride: 8
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byte_offset: 4096
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fieldset: LUTL
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- name: LUTH
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description: GFXMMU LUT entry 0 high.
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array:
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len: 1024
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stride: 8
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byte_offset: 4100
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fieldset: LUTH
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fieldset/BCR:
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description: GFXMMU buffer configuration register.
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fields:
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- name: PBO
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description: Physical buffer offset. Offset of the physical buffer.
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bit_offset: 4
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bit_size: 19
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- name: PBBA
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description: Physical buffer base address. Base address MSB of the physical buffer.
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bit_offset: 23
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bit_size: 9
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fieldset/CR:
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description: GFXMMU configuration register.
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fields:
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- name: BOIE
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description: Buffer overflow interrupt enable. This bit enables the buffer 0 overflow interrupt.
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bit_offset: 0
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bit_size: 1
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array:
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len: 4
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stride: 1
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- name: AMEIE
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description: AHB master error interrupt enable. This bit enables the AHB master error interrupt.
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bit_offset: 4
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bit_size: 1
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- name: BM
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description: 192 Block mode. This bit defines the number of blocks per line.
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bit_offset: 6
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bit_size: 1
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array:
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len: 1
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stride: 0
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enum: BM192
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fieldset/DVR:
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description: GFXMMU default value register.
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fields:
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- name: DV
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description: Default value. This field indicates the default 32-bit value which is returned when a master accesses a virtual memory location not physically mapped.
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bit_offset: 0
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bit_size: 32
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fieldset/FCR:
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description: GFXMMU flag clear register.
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fields:
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- name: CBOF
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description: Clear buffer overflow flag. Writing 1 clears the buffer 0 overflow flag in the GFXMMU_SR register.
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bit_offset: 0
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bit_size: 1
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array:
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len: 4
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stride: 1
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- name: CAMEF
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description: Clear AHB master error flag. Writing 1 clears the AHB master error flag in the GFXMMU_SR register.
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bit_offset: 4
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bit_size: 1
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fieldset/LUTH:
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description: GFXMMU LUT entry high.
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fields:
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- name: LO
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description: Line offset. Line offset of line number x (i.e. offset of block 0 of line x).
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bit_offset: 4
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bit_size: 18
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fieldset/LUTL:
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description: GFXMMU LUT entry low.
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fields:
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- name: EN
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description: Line enable.
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bit_offset: 0
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bit_size: 1
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- name: FVB
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description: First Valid Block. Number of the first valid block of line number x.
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bit_offset: 8
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bit_size: 8
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- name: LVB
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description: Last Valid Block. Number of the last valid block of line number X.
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bit_offset: 16
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bit_size: 8
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fieldset/SR:
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description: GFXMMU status register.
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fields:
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- name: BOF
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description: Buffer overflow flag. This bit is set when an overflow occurs during the offset calculation of the buffer 0. It is cleared by writing 1 to CB0OF.
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bit_offset: 0
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bit_size: 1
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array:
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len: 4
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stride: 1
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- name: AMEF
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description: AHB master error flag. This bit is set when an AHB error happens during a transaction. It is cleared by writing 1 to CAMEF.
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bit_offset: 4
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bit_size: 1
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enum/BM192:
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bit_size: 1
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variants:
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- name: 256BlocksPerLine
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description: 256 blocks per line.
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value: 0
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- name: 192BlocksPerLine
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description: 192 blocks per line.
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value: 1
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