560 lines
13 KiB
YAML
560 lines
13 KiB
YAML
---
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block/FLASH:
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description: Flash
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items:
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- byte_offset: 0
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description: Access control register
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fieldset: ACR
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name: ACR
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- access: Write
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byte_offset: 8
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description: Flash key register
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fieldset: KEYR
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name: KEYR
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- access: Write
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byte_offset: 12
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description: Option byte key register
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fieldset: OPTKEYR
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name: OPTKEYR
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- byte_offset: 16
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description: Status register
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fieldset: SR
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name: SR
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- byte_offset: 20
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description: Flash control register
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fieldset: CR
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name: CR
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- byte_offset: 24
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description: Flash ECC register
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fieldset: ECCR
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name: ECCR
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- byte_offset: 32
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description: Flash option register
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fieldset: OPTR
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name: OPTR
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- byte_offset: 36
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description: Flash Bank 1 PCROP Start address zone A register
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fieldset: PCROP1ASR
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name: PCROP1ASR
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- byte_offset: 40
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description: Flash Bank 1 PCROP End address zone A register
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fieldset: PCROP1AER
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name: PCROP1AER
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- byte_offset: 44
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description: Flash Bank 1 WRP area A address register
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fieldset: WRP1AR
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name: WRP1AR
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- byte_offset: 48
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description: Flash Bank 1 WRP area B address register
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fieldset: WRP1BR
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name: WRP1BR
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- byte_offset: 52
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description: Flash Bank 1 PCROP Start address area B register
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fieldset: PCROP1BSR
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name: PCROP1BSR
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- byte_offset: 56
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description: Flash Bank 1 PCROP End address area B register
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fieldset: PCROP1BER
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name: PCROP1BER
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- byte_offset: 60
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description: IPCC mailbox data buffer address register
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fieldset: IPCCBR
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name: IPCCBR
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- byte_offset: 92
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description: CPU2 cortex M0 access control register
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fieldset: C2ACR
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name: C2ACR
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- byte_offset: 96
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description: CPU2 cortex M0 status register
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fieldset: C2SR
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name: C2SR
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- byte_offset: 100
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description: CPU2 cortex M0 control register
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fieldset: C2CR
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name: C2CR
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- byte_offset: 128
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description: Secure flash start address register
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fieldset: SFR
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name: SFR
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- byte_offset: 132
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description: Secure SRAM2 start address and cortex M0 reset vector register
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fieldset: SRRVR
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name: SRRVR
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fieldset/ACR:
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description: Access control register
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fields:
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- bit_offset: 0
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bit_size: 3
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description: Latency
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name: LATENCY
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- bit_offset: 8
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bit_size: 1
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description: Prefetch enable
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name: PRFTEN
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- bit_offset: 9
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bit_size: 1
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description: Instruction cache enable
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name: ICEN
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- bit_offset: 10
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bit_size: 1
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description: Data cache enable
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name: DCEN
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- bit_offset: 11
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bit_size: 1
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description: Instruction cache reset
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name: ICRST
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- bit_offset: 12
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bit_size: 1
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description: Data cache reset
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name: DCRST
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- bit_offset: 15
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bit_size: 1
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description: CPU1 CortexM4 program erase suspend request
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name: PES
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- bit_offset: 16
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bit_size: 1
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description: Flash User area empty
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name: EMPTY
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fieldset/C2ACR:
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description: CPU2 cortex M0 access control register
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fields:
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- bit_offset: 8
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bit_size: 1
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description: CPU2 cortex M0 prefetch enable
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name: PRFTEN
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- bit_offset: 9
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bit_size: 1
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description: CPU2 cortex M0 instruction cache enable
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name: ICEN
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- bit_offset: 11
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bit_size: 1
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description: CPU2 cortex M0 instruction cache reset
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name: ICRST
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- bit_offset: 15
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bit_size: 1
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description: CPU2 cortex M0 program erase suspend request
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name: PES
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fieldset/C2CR:
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description: CPU2 cortex M0 control register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Programming
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name: PG
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- bit_offset: 1
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bit_size: 1
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description: Page erase
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name: PER
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- bit_offset: 2
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bit_size: 1
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description: Masse erase
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name: MER
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- bit_offset: 3
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bit_size: 8
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description: Page Number selection
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name: PNB
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- bit_offset: 16
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bit_size: 1
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description: Start
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name: STRT
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- bit_offset: 18
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bit_size: 1
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description: Fast programming
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name: FSTPG
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- bit_offset: 24
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bit_size: 1
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description: End of operation interrupt enable
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name: EOPIE
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- bit_offset: 25
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bit_size: 1
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description: Error interrupt enable
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name: ERRIE
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- bit_offset: 26
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bit_size: 1
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description: PCROP read error interrupt enable
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name: RDERRIE
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fieldset/C2SR:
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description: CPU2 cortex M0 status register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: End of operation
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name: EOP
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- bit_offset: 1
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bit_size: 1
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description: Operation error
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name: OPERR
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- bit_offset: 3
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bit_size: 1
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description: Programming error
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name: PROGERR
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- bit_offset: 4
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bit_size: 1
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description: write protection error
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name: WRPERR
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- bit_offset: 5
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bit_size: 1
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description: Programming alignment error
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name: PGAERR
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- bit_offset: 6
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bit_size: 1
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description: Size error
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name: SIZERR
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- bit_offset: 7
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bit_size: 1
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description: Programming sequence error
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name: PGSERR
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- bit_offset: 8
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bit_size: 1
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description: Fast programming data miss error
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name: MISSERR
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- bit_offset: 9
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bit_size: 1
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description: Fast programming error
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name: FASTERR
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- bit_offset: 14
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bit_size: 1
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description: PCROP read error
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name: RDERR
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- bit_offset: 16
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bit_size: 1
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description: Busy
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name: BSY
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- bit_offset: 18
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bit_size: 1
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description: Programming or erase configuration busy
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name: CFGBSY
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- bit_offset: 19
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bit_size: 1
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description: Programming or erase operation suspended
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name: PESD
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fieldset/CR:
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description: Flash control register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Programming
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name: PG
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- bit_offset: 1
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bit_size: 1
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description: Page erase
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name: PER
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- bit_offset: 2
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bit_size: 1
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description: This bit triggers the mass erase (all user pages) when set
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name: MER
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- bit_offset: 3
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bit_size: 8
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description: Page number selection
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name: PNB
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- bit_offset: 16
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bit_size: 1
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description: Start
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name: STRT
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- bit_offset: 17
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bit_size: 1
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description: Options modification start
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name: OPTSTRT
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- bit_offset: 18
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bit_size: 1
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description: Fast programming
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name: FSTPG
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- bit_offset: 24
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bit_size: 1
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description: End of operation interrupt enable
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name: EOPIE
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- bit_offset: 25
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bit_size: 1
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description: Error interrupt enable
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name: ERRIE
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- bit_offset: 26
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bit_size: 1
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description: PCROP read error interrupt enable
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name: RDERRIE
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- bit_offset: 27
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bit_size: 1
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description: Force the option byte loading
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name: OBL_LAUNCH
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- bit_offset: 30
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bit_size: 1
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description: Options Lock
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name: OPTLOCK
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- bit_offset: 31
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bit_size: 1
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description: FLASH_CR Lock
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name: LOCK
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fieldset/ECCR:
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description: Flash ECC register
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fields:
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- bit_offset: 0
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bit_size: 17
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description: ECC fail address
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name: ADDR_ECC
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- bit_offset: 20
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bit_size: 1
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description: System Flash ECC fail
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name: SYSF_ECC
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- bit_offset: 24
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bit_size: 1
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description: ECC correction interrupt enable
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name: ECCCIE
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- bit_offset: 26
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bit_size: 3
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description: CPU identification
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name: CPUID
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- bit_offset: 30
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bit_size: 1
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description: ECC correction
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name: ECCC
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- bit_offset: 31
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bit_size: 1
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description: ECC detection
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name: ECCD
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fieldset/IPCCBR:
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description: IPCC mailbox data buffer address register
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fields:
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- bit_offset: 0
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bit_size: 14
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description: PCC mailbox data buffer base address
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name: IPCCDBA
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fieldset/KEYR:
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description: Flash key register
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fields:
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- bit_offset: 0
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bit_size: 32
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description: KEYR
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name: KEYR
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fieldset/OPTKEYR:
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description: Option byte key register
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fields:
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- bit_offset: 0
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bit_size: 32
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description: Option byte key
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name: OPTKEYR
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fieldset/OPTR:
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description: Flash option register
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fields:
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- bit_offset: 0
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bit_size: 8
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description: Read protection level
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name: RDP
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- bit_offset: 8
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bit_size: 1
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description: Security enabled
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name: ESE
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- bit_offset: 9
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bit_size: 3
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description: BOR reset Level
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name: BOR_LEV
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- bit_offset: 12
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bit_size: 1
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description: nRST_STOP
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name: nRST_STOP
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- bit_offset: 13
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bit_size: 1
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description: nRST_STDBY
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name: nRST_STDBY
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- bit_offset: 14
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bit_size: 1
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description: nRST_SHDW
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name: nRST_SHDW
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- bit_offset: 16
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bit_size: 1
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description: Independent watchdog selection
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name: IDWG_SW
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- bit_offset: 17
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bit_size: 1
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description: Independent watchdog counter freeze in Stop mode
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name: IWDG_STOP
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- bit_offset: 18
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bit_size: 1
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description: Independent watchdog counter freeze in Standby mode
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name: IWDG_STDBY
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- bit_offset: 19
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bit_size: 1
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description: Window watchdog selection
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name: WWDG_SW
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- bit_offset: 23
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bit_size: 1
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description: Boot configuration
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name: nBOOT1
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- bit_offset: 24
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bit_size: 1
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description: SRAM2 parity check enable
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name: SRAM2_PE
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- bit_offset: 25
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bit_size: 1
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description: SRAM2 Erase when system reset
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name: SRAM2_RST
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- bit_offset: 26
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bit_size: 1
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description: Software Boot0
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name: nSWBOOT0
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- bit_offset: 27
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bit_size: 1
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description: nBoot0 option bit
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name: nBOOT0
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- bit_offset: 29
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bit_size: 3
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description: Radio Automatic Gain Control Trimming
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name: AGC_TRIM
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fieldset/PCROP1AER:
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description: Flash Bank 1 PCROP End address zone A register
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fields:
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- bit_offset: 0
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bit_size: 9
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description: Bank 1 PCROP area end offset
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name: PCROP1A_END
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- bit_offset: 31
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bit_size: 1
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description: PCROP area preserved when RDP level decreased
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name: PCROP_RDP
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fieldset/PCROP1ASR:
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description: Flash Bank 1 PCROP Start address zone A register
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fields:
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- bit_offset: 0
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bit_size: 9
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description: Bank 1 PCROPQ area start offset
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name: PCROP1A_STRT
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fieldset/PCROP1BER:
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description: Flash Bank 1 PCROP End address area B register
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fields:
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- bit_offset: 0
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bit_size: 9
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description: Bank 1 PCROP area end area B offset
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name: PCROP1B_END
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fieldset/PCROP1BSR:
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description: Flash Bank 1 PCROP Start address area B register
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fields:
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- bit_offset: 0
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bit_size: 9
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description: Bank 1 PCROP area B start offset
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name: PCROP1B_STRT
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fieldset/SFR:
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description: Secure flash start address register
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fields:
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- bit_offset: 0
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bit_size: 8
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description: Secure flash start address
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name: SFSA
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- bit_offset: 8
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bit_size: 1
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description: Flash security disable
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name: FSD
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- bit_offset: 12
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bit_size: 1
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description: Disable Cortex M0 debug access
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name: DDS
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fieldset/SR:
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description: Status register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: End of operation
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name: EOP
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- bit_offset: 1
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bit_size: 1
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description: Operation error
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name: OPERR
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- bit_offset: 3
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bit_size: 1
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description: Programming error
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name: PROGERR
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- bit_offset: 4
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bit_size: 1
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description: Write protected error
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name: WRPERR
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- bit_offset: 5
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bit_size: 1
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description: Programming alignment error
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name: PGAERR
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- bit_offset: 6
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bit_size: 1
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description: Size error
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name: SIZERR
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- bit_offset: 7
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bit_size: 1
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description: Programming sequence error
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name: PGSERR
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- bit_offset: 8
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bit_size: 1
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description: Fast programming data miss error
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name: MISERR
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- bit_offset: 9
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bit_size: 1
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description: Fast programming error
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name: FASTERR
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- bit_offset: 13
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bit_size: 1
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description: User Option OPTVAL indication
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name: OPTNV
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- bit_offset: 14
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bit_size: 1
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description: PCROP read error
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name: RDERR
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- bit_offset: 15
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bit_size: 1
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description: Option validity error
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name: OPTVERR
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- bit_offset: 16
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bit_size: 1
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description: Busy
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name: BSY
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- bit_offset: 18
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bit_size: 1
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description: Programming or erase configuration busy
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name: CFGBSY
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- bit_offset: 19
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bit_size: 1
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description: Programming or erase operation suspended
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name: PESD
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fieldset/SRRVR:
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description: Secure SRAM2 start address and cortex M0 reset vector register
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fields:
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- bit_offset: 0
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bit_size: 18
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description: cortex M0 access control register
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name: SBRV
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- bit_offset: 18
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bit_size: 5
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description: Secure backup SRAM2a start address
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name: SBRSA
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- bit_offset: 23
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bit_size: 1
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description: backup SRAM2a security disable
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name: BRSD
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- bit_offset: 25
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bit_size: 5
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description: Secure non backup SRAM2a start address
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name: SNBRSA
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- bit_offset: 30
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bit_size: 1
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description: non-backup SRAM2b security disable
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name: NBRSD
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- bit_offset: 31
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bit_size: 1
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description: CPU2 cortex M0 boot reset vector memory selection
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name: C2OPT
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fieldset/WRP1AR:
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description: Flash Bank 1 WRP area A address register
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fields:
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- bit_offset: 0
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bit_size: 8
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description: Bank 1 WRP first area A start offset
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name: WRP1A_STRT
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- bit_offset: 16
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bit_size: 8
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description: Bank 1 WRP first area A end offset
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name: WRP1A_END
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fieldset/WRP1BR:
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description: Flash Bank 1 WRP area B address register
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fields:
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- bit_offset: 0
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bit_size: 8
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description: Bank 1 WRP second area B start offset
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name: WRP1B_END
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- bit_offset: 16
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bit_size: 8
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description: Bank 1 WRP second area B end offset
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name: WRP1B_STRT
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