633 lines
17 KiB
YAML
633 lines
17 KiB
YAML
block/BANK:
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description: Cluster BANK%s, containing KEYR?, CR?, SR?, CCR?, PRAR_CUR?, PRAR_PRG?, SCAR_CUR?, SCAR_PRG?, WPSN_CUR?R, WPSN_PRG?R, CRCCR?, CRCSADD?R, CRCEADD?R, ECC_FA?R
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items:
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- name: KEYR
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description: FLASH key register for bank 1
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byte_offset: 0
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access: Write
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- name: CR
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description: FLASH control register for bank 1
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byte_offset: 8
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fieldset: CR
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- name: SR
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description: FLASH status register for bank 1
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byte_offset: 12
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fieldset: SR
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- name: CCR
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description: FLASH clear control register for bank 1
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byte_offset: 16
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fieldset: CCR
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- name: PRAR_CUR
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description: FLASH protection address for bank 1
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byte_offset: 36
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access: Read
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fieldset: PRAR_CUR
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- name: PRAR_PRG
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description: FLASH protection address for bank 1
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byte_offset: 40
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fieldset: PRAR_PRG
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- name: SCAR_CUR
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description: FLASH secure address for bank 1
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byte_offset: 44
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fieldset: SCAR_CUR
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- name: SCAR_PRG
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description: FLASH secure address for bank 1
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byte_offset: 48
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fieldset: SCAR_PRG
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- name: WPSN_CURR
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description: FLASH write sector protection for bank 1
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byte_offset: 52
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access: Read
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fieldset: WPSN_CURR
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- name: WPSN_PRGR
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description: FLASH write sector protection for bank 1
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byte_offset: 56
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fieldset: WPSN_PRGR
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- name: CRCCR
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description: FLASH CRC control register for bank 1
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byte_offset: 76
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fieldset: CRCCR
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- name: CRCSADDR
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description: FLASH CRC start address register for bank 1
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byte_offset: 80
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fieldset: CRCSADDR
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- name: CRCEADDR
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description: FLASH CRC end address register for bank 1
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byte_offset: 84
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fieldset: CRCEADDR
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- name: FAR
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description: FLASH ECC fail address for bank 1
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byte_offset: 92
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access: Read
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fieldset: FAR
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block/FLASH:
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description: Flash
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items:
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- name: ACR
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description: Access control register
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byte_offset: 0
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fieldset: ACR
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- name: BANK
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description: Cluster BANK%s, containing KEYR?, CR?, SR?, CCR?, PRAR_CUR?, PRAR_PRG?, SCAR_CUR?, SCAR_PRG?, WPSN_CUR?R, WPSN_PRG?R, CRCCR?, CRCSADD?R, CRCEADD?R, ECC_FA?R
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array:
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len: 2
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stride: 256
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byte_offset: 4
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block: BANK
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- name: OPTKEYR
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description: FLASH option key register
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byte_offset: 8
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- name: OPTCR
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description: FLASH option control register
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byte_offset: 24
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fieldset: OPTCR
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- name: OPTSR_CUR
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description: FLASH option status register
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byte_offset: 28
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fieldset: OPTSR_CUR
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- name: OPTSR_PRG
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description: FLASH option status register
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byte_offset: 32
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fieldset: OPTSR_PRG
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- name: OPTCCR
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description: FLASH option clear control register
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byte_offset: 36
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access: Write
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fieldset: OPTCCR
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- name: BOOT_CURR
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description: FLASH register with boot address
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byte_offset: 64
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access: Read
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fieldset: BOOT_CURR
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- name: BOOT_PRGR
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description: FLASH register with boot address
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byte_offset: 68
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fieldset: BOOT_PRGR
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- name: CRCDATAR
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description: FLASH CRC data register
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byte_offset: 92
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fieldset: CRCDATAR
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fieldset/ACR:
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description: Access control register
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fields:
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- name: LATENCY
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description: Read latency
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bit_offset: 0
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bit_size: 3
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- name: WRHIGHFREQ
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description: Flash signal delay
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bit_offset: 4
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bit_size: 2
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fieldset/BOOT_CURR:
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description: FLASH register with boot address
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fields:
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- name: BOOT_ADD0
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description: Boot address 0
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bit_offset: 0
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bit_size: 16
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- name: BOOT_ADD1
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description: Boot address 1
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bit_offset: 16
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bit_size: 16
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fieldset/BOOT_PRGR:
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description: FLASH register with boot address
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fields:
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- name: BOOT_ADD0
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description: Boot address 0
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bit_offset: 0
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bit_size: 16
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- name: BOOT_ADD1
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description: Boot address 1
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bit_offset: 16
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bit_size: 16
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fieldset/CCR:
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description: FLASH clear control register for bank 1
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fields:
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- name: CLR_EOP
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description: Bank 1 EOP1 flag clear bit
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bit_offset: 16
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bit_size: 1
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- name: CLR_WRPERR
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description: Bank 1 WRPERR1 flag clear bit
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bit_offset: 17
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bit_size: 1
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- name: CLR_PGSERR
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description: Bank 1 PGSERR1 flag clear bi
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bit_offset: 18
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bit_size: 1
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- name: CLR_STRBERR
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description: Bank 1 STRBERR1 flag clear bit
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bit_offset: 19
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bit_size: 1
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- name: CLR_INCERR
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description: Bank 1 INCERR1 flag clear bit
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bit_offset: 21
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bit_size: 1
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- name: CLR_OPERR
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description: Bank 1 OPERR1 flag clear bit
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bit_offset: 22
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bit_size: 1
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- name: CLR_RDPERR
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description: Bank 1 RDPERR1 flag clear bit
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bit_offset: 23
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bit_size: 1
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- name: CLR_RDSERR
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description: Bank 1 RDSERR1 flag clear bit
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bit_offset: 24
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bit_size: 1
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- name: CLR_SNECCERR
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description: Bank 1 SNECCERR1 flag clear bit
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bit_offset: 25
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bit_size: 1
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- name: CLR_DBECCERR
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description: Bank 1 DBECCERR1 flag clear bit
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bit_offset: 26
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bit_size: 1
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- name: CLR_CRCEND
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description: Bank 1 CRCEND1 flag clear bit
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bit_offset: 27
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bit_size: 1
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- name: CLR_CRCRDERR
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description: Bank 1 CRC read error clear bit
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bit_offset: 28
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bit_size: 1
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fieldset/CR:
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description: FLASH control register for bank 1
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fields:
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- name: LOCK
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description: Bank 1 configuration lock bit
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bit_offset: 0
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bit_size: 1
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- name: PG
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description: Bank 1 program enable bit
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bit_offset: 1
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bit_size: 1
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- name: SER
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description: Bank 1 sector erase request
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bit_offset: 2
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bit_size: 1
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- name: BER
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description: Bank 1 erase request
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bit_offset: 3
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bit_size: 1
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- name: PSIZE
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description: Bank 1 program size
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bit_offset: 4
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bit_size: 2
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- name: FW
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description: Bank 1 write forcing control bit
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bit_offset: 6
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bit_size: 1
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- name: START
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description: Bank 1 bank or sector erase start control bit
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bit_offset: 7
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bit_size: 1
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- name: SNB
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description: Bank 1 sector erase selection number
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bit_offset: 8
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bit_size: 3
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- name: CRC_EN
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description: Bank 1 CRC control bit
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bit_offset: 15
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bit_size: 1
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- name: EOPIE
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description: Bank 1 end-of-program interrupt control bit
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bit_offset: 16
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bit_size: 1
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- name: WRPERRIE
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description: Bank 1 write protection error interrupt enable bit
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bit_offset: 17
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bit_size: 1
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- name: PGSERRIE
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description: Bank 1 programming sequence error interrupt enable bit
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bit_offset: 18
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bit_size: 1
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- name: STRBERRIE
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description: Bank 1 strobe error interrupt enable bit
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bit_offset: 19
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bit_size: 1
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- name: INCERRIE
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description: Bank 1 inconsistency error interrupt enable bit
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bit_offset: 21
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bit_size: 1
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- name: OPERRIE
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description: Bank 1 write/erase error interrupt enable bit
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bit_offset: 22
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bit_size: 1
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- name: RDPERRIE
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description: Bank 1 read protection error interrupt enable bit
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bit_offset: 23
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bit_size: 1
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- name: RDSERRIE
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description: Bank 1 secure error interrupt enable bit
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bit_offset: 24
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bit_size: 1
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- name: SNECCERRIE
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description: Bank 1 ECC single correction error interrupt enable bit
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bit_offset: 25
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bit_size: 1
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- name: DBECCERRIE
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description: Bank 1 ECC double detection error interrupt enable bit
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bit_offset: 26
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bit_size: 1
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- name: CRCENDIE
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description: Bank 1 end of CRC calculation interrupt enable bit
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bit_offset: 27
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bit_size: 1
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- name: CRCRDERRIE
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description: Bank 1 CRC read error interrupt enable bit
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bit_offset: 28
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bit_size: 1
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fieldset/CRCCR:
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description: FLASH CRC control register for bank 1
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fields:
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- name: CRC_SECT
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description: Bank 1 CRC sector number
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bit_offset: 0
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bit_size: 3
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- name: ALL_BANK
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description: Bank 1 CRC select bit
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bit_offset: 7
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bit_size: 1
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- name: CRC_BY_SECT
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description: Bank 1 CRC sector mode select bit
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bit_offset: 8
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bit_size: 1
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- name: ADD_SECT
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description: Bank 1 CRC sector select bit
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bit_offset: 9
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bit_size: 1
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- name: CLEAN_SECT
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description: Bank 1 CRC sector list clear bit
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bit_offset: 10
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bit_size: 1
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- name: START_CRC
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description: Bank 1 CRC start bit
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bit_offset: 16
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bit_size: 1
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- name: CLEAN_CRC
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description: Bank 1 CRC clear bit
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bit_offset: 17
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bit_size: 1
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- name: CRC_BURST
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description: Bank 1 CRC burst size
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bit_offset: 20
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bit_size: 2
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fieldset/CRCDATAR:
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description: FLASH CRC data register
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fields:
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- name: CRC_DATA
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description: CRC result
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bit_offset: 0
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bit_size: 32
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fieldset/CRCEADDR:
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description: FLASH CRC end address register for bank 1
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fields:
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- name: CRC_END_ADDR
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description: CRC end address on bank 1
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bit_offset: 0
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bit_size: 32
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fieldset/CRCSADDR:
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description: FLASH CRC start address register for bank 1
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fields:
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- name: CRC_START_ADDR
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description: CRC start address on bank 1
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bit_offset: 0
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bit_size: 32
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fieldset/FAR:
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description: FLASH ECC fail address for bank 1
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fields:
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- name: FAIL_ECC_ADDR
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description: Bank 1 ECC error address
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bit_offset: 0
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bit_size: 15
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fieldset/OPTCCR:
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description: FLASH option clear control register
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fields:
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- name: CLR_OPTCHANGEERR
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description: OPTCHANGEERR reset bit
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bit_offset: 30
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bit_size: 1
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fieldset/OPTCR:
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description: FLASH option control register
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fields:
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- name: OPTLOCK
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description: FLASH_OPTCR lock option configuration bit
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bit_offset: 0
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bit_size: 1
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- name: OPTSTART
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description: Option byte start change option configuration bit
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bit_offset: 1
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bit_size: 1
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- name: MER
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description: Flash mass erase enable bit
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bit_offset: 4
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bit_size: 1
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- name: OPTCHANGEERRIE
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description: Option byte change error interrupt enable bit
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bit_offset: 30
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bit_size: 1
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- name: SWAP_BANK
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description: Bank swapping configuration bit
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bit_offset: 31
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bit_size: 1
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fieldset/OPTSR_CUR:
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description: FLASH option status register
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fields:
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- name: OPT_BUSY
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description: Option byte change ongoing flag
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bit_offset: 0
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bit_size: 1
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- name: BOR_LEV
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description: Brownout level option status bit
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bit_offset: 2
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bit_size: 2
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- name: IWDG1_HW
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description: IWDG1 control option status bit
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bit_offset: 4
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bit_size: 1
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- name: nRST_STOP_D1
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description: D1 DStop entry reset option status bit
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bit_offset: 6
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bit_size: 1
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- name: nRST_STBY_D1
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description: D1 DStandby entry reset option status bit
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bit_offset: 7
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bit_size: 1
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- name: RDP
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description: Readout protection level option status byte
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bit_offset: 8
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bit_size: 8
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- name: FZ_IWDG_STOP
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description: IWDG Stop mode freeze option status bit
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bit_offset: 17
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bit_size: 1
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- name: FZ_IWDG_SDBY
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description: IWDG Standby mode freeze option status bit
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bit_offset: 18
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bit_size: 1
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- name: ST_RAM_SIZE
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description: DTCM RAM size option status
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bit_offset: 19
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bit_size: 2
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- name: SECURITY
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description: Security enable option status bit
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bit_offset: 21
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bit_size: 1
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- name: RSS1
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description: User option bit 1
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bit_offset: 26
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bit_size: 1
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- name: PERSO_OK
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description: Device personalization status bit
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bit_offset: 28
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bit_size: 1
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- name: IO_HSLV
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description: I/O high-speed at low-voltage status bit (PRODUCT_BELOW_25V)
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bit_offset: 29
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bit_size: 1
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- name: OPTCHANGEERR
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description: Option byte change error flag
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bit_offset: 30
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bit_size: 1
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- name: SWAP_BANK_OPT
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description: Bank swapping option status bit
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bit_offset: 31
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bit_size: 1
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fieldset/OPTSR_PRG:
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description: FLASH option status register
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fields:
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- name: BOR_LEV
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description: BOR reset level option configuration bits
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bit_offset: 2
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bit_size: 2
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- name: IWDG1_HW
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description: IWDG1 option configuration bit
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bit_offset: 4
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bit_size: 1
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- name: nRST_STOP_D1
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description: Option byte erase after D1 DStop option configuration bit
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bit_offset: 6
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bit_size: 1
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- name: nRST_STBY_D1
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description: Option byte erase after D1 DStandby option configuration bit
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bit_offset: 7
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bit_size: 1
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- name: RDP
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description: Readout protection level option configuration byte
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bit_offset: 8
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bit_size: 8
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- name: FZ_IWDG_STOP
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description: IWDG Stop mode freeze option configuration bit
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bit_offset: 17
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bit_size: 1
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- name: FZ_IWDG_SDBY
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description: IWDG Standby mode freeze option configuration bit
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bit_offset: 18
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bit_size: 1
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- name: ST_RAM_SIZE
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description: DTCM size select option configuration bits
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bit_offset: 19
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bit_size: 2
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- name: SECURITY
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description: Security option configuration bit
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bit_offset: 21
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bit_size: 1
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- name: RSS1
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description: User option configuration bit 1
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bit_offset: 26
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bit_size: 1
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- name: RSS2
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description: User option configuration bit 2
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bit_offset: 27
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bit_size: 1
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- name: IO_HSLV
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description: I/O high-speed at low-voltage (PRODUCT_BELOW_25V)
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bit_offset: 29
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bit_size: 1
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- name: SWAP_BANK_OPT
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description: Bank swapping option configuration bit
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bit_offset: 31
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bit_size: 1
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fieldset/PRAR_CUR:
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description: FLASH protection address for bank 1
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fields:
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- name: PROT_AREA_START
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description: Bank 1 lowest PCROP protected address
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bit_offset: 0
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bit_size: 12
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- name: PROT_AREA_END
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description: Bank 1 highest PCROP protected address
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bit_offset: 16
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bit_size: 12
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- name: DMEP
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description: Bank 1 PCROP protected erase enable option status bit
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bit_offset: 31
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bit_size: 1
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fieldset/PRAR_PRG:
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description: FLASH protection address for bank 1
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fields:
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- name: PROT_AREA_START
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description: Bank 1 lowest PCROP protected address configuration
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bit_offset: 0
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bit_size: 12
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- name: PROT_AREA_END
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description: Bank 1 highest PCROP protected address configuration
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bit_offset: 16
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bit_size: 12
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- name: DMEP
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description: Bank 1 PCROP protected erase enable option configuration bit
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bit_offset: 31
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bit_size: 1
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fieldset/SCAR_CUR:
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description: FLASH secure address for bank 1
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fields:
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- name: SEC_AREA_START
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description: Bank 1 lowest secure protected address
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bit_offset: 0
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bit_size: 12
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- name: SEC_AREA_END
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description: Bank 1 highest secure protected address
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bit_offset: 16
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bit_size: 12
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- name: DMES
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description: Bank 1 secure protected erase enable option status bit
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bit_offset: 31
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bit_size: 1
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fieldset/SCAR_PRG:
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description: FLASH secure address for bank 1
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fields:
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- name: SEC_AREA_START
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description: Bank 1 lowest secure protected address configuration
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bit_offset: 0
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bit_size: 12
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- name: SEC_AREA_END
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description: Bank 1 highest secure protected address configuration
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bit_offset: 16
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bit_size: 12
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- name: DMES
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description: Bank 1 secure protected erase enable option configuration bit
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bit_offset: 31
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bit_size: 1
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fieldset/SR:
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description: FLASH status register for bank 1
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fields:
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- name: BSY
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description: Bank 1 ongoing program flag
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bit_offset: 0
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bit_size: 1
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- name: WBNE
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description: Bank 1 write buffer not empty flag
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bit_offset: 1
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bit_size: 1
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- name: QW
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description: Bank 1 wait queue flag
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bit_offset: 2
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bit_size: 1
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- name: CRC_BUSY
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description: Bank 1 CRC busy flag
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bit_offset: 3
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bit_size: 1
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- name: EOP
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description: Bank 1 end-of-program flag
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bit_offset: 16
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bit_size: 1
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- name: WRPERR
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description: Bank 1 write protection error flag
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bit_offset: 17
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bit_size: 1
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- name: PGSERR
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description: Bank 1 programming sequence error flag
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bit_offset: 18
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bit_size: 1
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- name: STRBERR
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description: Bank 1 strobe error flag
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bit_offset: 19
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bit_size: 1
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- name: INCERR
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description: Bank 1 inconsistency error flag
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bit_offset: 21
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bit_size: 1
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- name: OPERR
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description: Bank 1 write/erase error flag
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bit_offset: 22
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bit_size: 1
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- name: RDPERR
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description: Bank 1 read protection error flag
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bit_offset: 23
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bit_size: 1
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- name: RDSERR
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description: Bank 1 secure error flag
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bit_offset: 24
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bit_size: 1
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- name: SNECCERR1
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description: Bank 1 single correction error flag
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bit_offset: 25
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bit_size: 1
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- name: DBECCERR
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description: Bank 1 ECC double detection error flag
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bit_offset: 26
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bit_size: 1
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- name: CRCEND
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description: Bank 1 CRC-complete flag
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bit_offset: 27
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bit_size: 1
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- name: CRCRDERR
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description: Bank 1 CRC read error flag
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bit_offset: 28
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bit_size: 1
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fieldset/WPSN_CURR:
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description: FLASH write sector protection for bank 1
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fields:
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- name: WRPSn
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description: Bank 1 sector write protection option status byte
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bit_offset: 0
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bit_size: 8
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fieldset/WPSN_PRGR:
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description: FLASH write sector protection for bank 1
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fields:
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- name: WRPSn
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description: Bank 1 sector write protection configuration byte
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bit_offset: 0
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bit_size: 8
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