fc64e88b92
Extract ADC_COMMON Create framework for extra synthetic hand-crafted peripherals. Add VREFINTCAL reg/block/peripheral for STM32L4+.
156 lines
3.9 KiB
YAML
156 lines
3.9 KiB
YAML
---
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block/ADC_COMMON:
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description: Analog-to-Digital Converter
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items:
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- name: CSR
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description: ADC Common status register
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byte_offset: 0
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access: Read
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fieldset: CSR
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- name: CCR
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description: ADC common control register
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byte_offset: 8
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fieldset: CCR
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- name: CDR
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description: ADC common regular data register for dual and triple modes
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byte_offset: 12
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access: Read
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fieldset: CDR
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fieldset/CCR:
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description: ADC common control register
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fields:
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- name: MULT
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description: Multi ADC mode selection
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bit_offset: 0
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bit_size: 5
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- name: DELAY
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description: Delay between 2 sampling phases
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bit_offset: 8
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bit_size: 4
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- name: DMACFG
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description: DMA configuration (for multi-ADC mode)
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bit_offset: 13
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bit_size: 1
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- name: MDMA
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description: Direct memory access mode for multi ADC mode
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bit_offset: 14
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bit_size: 2
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- name: CKMODE
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description: ADC clock mode
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bit_offset: 16
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bit_size: 2
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- name: VREFEN
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description: VREFINT enable
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bit_offset: 22
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bit_size: 1
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- name: CH18SEL
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description: CH18 selection (Vbat)
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bit_offset: 23
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bit_size: 1
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- name: CH17SEL
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description: CH17 selection (temperature)
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bit_offset: 24
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bit_size: 1
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fieldset/CDR:
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description: ADC common regular data register for dual and triple modes
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fields:
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- name: RDATA_MST
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description: Regular data of the master ADC
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bit_offset: 0
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bit_size: 16
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- name: RDATA_SLV
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description: Regular data of the slave ADC
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bit_offset: 16
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bit_size: 16
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fieldset/CSR:
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description: ADC Common status register
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fields:
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- name: ADDRDY_MST
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description: ADDRDY_MST
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bit_offset: 0
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bit_size: 1
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- name: EOSMP_MST
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description: EOSMP_MST
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bit_offset: 1
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bit_size: 1
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- name: EOC_MST
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description: EOC_MST
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bit_offset: 2
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bit_size: 1
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- name: EOS_MST
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description: EOS_MST
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bit_offset: 3
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bit_size: 1
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- name: OVR_MST
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description: OVR_MST
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bit_offset: 4
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bit_size: 1
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- name: JEOC_MST
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description: JEOC_MST
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bit_offset: 5
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bit_size: 1
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- name: JEOS_MST
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description: JEOS_MST
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bit_offset: 6
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bit_size: 1
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- name: AWD1_MST
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description: AWD1_MST
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bit_offset: 7
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bit_size: 1
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- name: AWD2_MST
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description: AWD2_MST
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bit_offset: 8
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bit_size: 1
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- name: AWD3_MST
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description: AWD3_MST
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bit_offset: 9
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bit_size: 1
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- name: JQOVF_MST
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description: JQOVF_MST
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bit_offset: 10
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bit_size: 1
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- name: ADRDY_SLV
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description: ADRDY_SLV
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bit_offset: 16
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bit_size: 1
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- name: EOSMP_SLV
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description: EOSMP_SLV
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bit_offset: 17
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bit_size: 1
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- name: EOC_SLV
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description: End of regular conversion of the slave ADC
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bit_offset: 18
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bit_size: 1
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- name: EOS_SLV
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description: End of regular sequence flag of the slave ADC
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bit_offset: 19
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bit_size: 1
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- name: OVR_SLV
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description: Overrun flag of the slave ADC
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bit_offset: 20
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bit_size: 1
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- name: JEOC_SLV
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description: End of injected conversion flag of the slave ADC
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bit_offset: 21
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bit_size: 1
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- name: JEOS_SLV
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description: End of injected sequence flag of the slave ADC
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bit_offset: 22
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bit_size: 1
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- name: AWD1_SLV
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description: Analog watchdog 1 flag of the slave ADC
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bit_offset: 23
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bit_size: 1
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- name: AWD2_SLV
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description: Analog watchdog 2 flag of the slave ADC
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bit_offset: 24
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bit_size: 1
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- name: AWD3_SLV
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description: Analog watchdog 3 flag of the slave ADC
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bit_offset: 25
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bit_size: 1
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- name: JQOVF_SLV
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description: Injected Context Queue Overflow flag of the slave ADC
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bit_offset: 26
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bit_size: 1
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