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stm32-data/data/registers/syscfg_f3.yaml
VasanthakumarV b9193128ed [manual] Make EXTICRx in SYSCFG register an array 
The four variants of EXTICRx has been manually edited into
an array of size and stride four.
The corresponding fieldset was also manually changed.
2021-12-09 13:47:55 +05:30

1297 lines
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block/SYSCFG:
description: System configuration controller
items:
- byte_offset: 0
description: configuration register 1
fieldset: CFGR1
name: CFGR1
- byte_offset: 4
description: CCM SRAM protection register
fieldset: RCR
name: RCR
- byte_offset: 8
description: external interrupt configuration register
fieldset: EXTICR
name: EXTICR
array:
len: 4
stride: 4
- byte_offset: 24
description: configuration register 2
fieldset: CFGR2
name: CFGR2
- byte_offset: 72
description: configuration register 4
fieldset: CFGR4
name: CFGR4
- byte_offset: 80
description: configuration register 3
fieldset: CFGR3
name: CFGR3
enum/ADC12_EXT13_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM6_TRGO
name: Tim6
value: 0
- description: Trigger source is TIM20_CC2
name: Tim20
value: 1
enum/ADC12_EXT15_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM3_CC4
name: Tim3
value: 0
- description: Trigger source is TIM20_CC3
name: Tim20
value: 1
enum/ADC12_EXT2_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM3_CC3
name: Tim1
value: 0
- description: rigger source is TIM20_TRGO
name: Tim20
value: 1
enum/ADC12_EXT3_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM2_CC2
name: Tim2
value: 0
- description: rigger source is TIM20_TRGO2
name: Tim20
value: 1
enum/ADC12_EXT5_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM4_CC4
name: Tim4
value: 0
- description: Trigger source is TIM20_CC1
name: Tim20
value: 1
enum/ADC12_JEXT13_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM3_CC1
name: Tim3
value: 0
- description: Trigger source is TIM20_CC4
name: Tim20
value: 1
enum/ADC12_JEXT3_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM2_CC1
name: Tim2
value: 0
- description: Trigger source is TIM20_TRGO
name: Tim20
value: 1
enum/ADC12_JEXT6_RMP:
bit_size: 1
variants:
- description: Trigger source is EXTI line 15
name: Exti15
value: 0
- description: Trigger source is TIM20_TRGO2
name: Tim20
value: 1
enum/ADC2_DMA_RMP:
bit_size: 1
variants:
- description: ADC2 mapped on DMA2
name: MapDma2
value: 0
- description: ADC2 mapped on DMA1 channel 2
name: MapDma1Ch2
value: 2
- description: ADC2 mapped on DMA1 channel 4
name: MapDma1Ch4
value: 3
enum/ADC34_EXT15_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM2_CC1
name: Tim2
value: 0
- description: Trigger source is TIM20_CC1
name: Tim20
value: 1
enum/ADC34_EXT5_RMP:
bit_size: 1
variants:
- description: Trigger source is EXTI line 2 when reset at 0
name: Exti2
value: 0
- description: Trigger source is TIM20_TRGO
name: Tim20
value: 1
enum/ADC34_EXT6_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM4_CC1
name: Tim4
value: 0
- description: Trigger source is TIM20_TRGO2
name: Tim20
value: 1
enum/ADC34_JEXT11_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM1_CC3
name: Tim1
value: 0
- description: Trigger source is TIM20_TRGO2
name: Tim20
value: 1
enum/ADC34_JEXT14_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM7_TRGO
name: Tim7
value: 0
- description: Trigger source is TIM20_CC2
name: Tim20
value: 1
enum/ADC34_JEXT5_RMP:
bit_size: 1
variants:
- description: Trigger source is TIM4_CC3
name: Tim4
value: 0
- description: Trigger source is TIM20_TRGO
name: Tim20
value: 1
enum/BYP_ADDR_PAR:
bit_size: 1
variants:
- description: The ramload operation is performed taking into consideration bit
29 of the address when the parity is calculated
name: NoBypass
value: 0
- description: The ramload operation is performed without taking into consideration
bit 29 of the address when the parity is calculated
name: Bypass
value: 1
enum/CFGR1_ADC2_DMA_RMP:
bit_size: 1
variants:
- description: ADC24 DMA requests mapped on DMA2 channels 1 and 2
name: NotRemapped
value: 0
- description: ADC24 DMA requests mapped on DMA2 channels 3 and 4
name: Remapped
value: 1
enum/CFGR3_ADC2_DMA_RMP:
bit_size: 2
variants:
- description: ADC2 mapped on DMA2
name: MapDma2
value: 0
- description: ADC2 mapped on DMA1 channel 2
name: MapDma1Ch2
value: 2
- description: ADC2 mapped on DMA1 channel 4
name: MapDma1Ch4
value: 3
enum/DAC1_TRIG3_RMP:
bit_size: 1
variants:
- description: DAC trigger is TIM15_TRGO
name: Tim15
value: 0
- description: DAC trigger is HRTIM1_DAC1_TRIG1
name: HrTim1
value: 1
enum/DAC1_TRIG5_RMP:
bit_size: 1
variants:
- description: Not remapped
name: NotRemapped
value: 0
- description: DAC trigger is HRTIM1_DAC1_TRIG2
name: Remapped
value: 1
enum/DAC1_TRIG_RMP:
bit_size: 1
variants:
- description: DAC trigger is TIM8_TRGO in STM32F303xB/C and STM32F358xC devices
name: NotRemapped
value: 0
- description: DAC trigger is TIM3_TRGO
name: Remapped
value: 1
enum/DAC2_CH1_DMA_RMP:
bit_size: 1
variants:
- description: Not remapped
name: NotRemapped
value: 0
- description: DAC2_CH1 DMA requests mapped on DMA1 channel 5
name: Remapped
value: 1
enum/DAC_TRIG_RMP:
bit_size: 1
variants:
- description: Not remapped
name: NotRemapped
value: 0
- description: DAC trigger is TIM3_TRGO
name: Remapped
value: 1
enum/ENCODER_MODE:
bit_size: 2
variants:
- description: No redirection
name: NoRedirection
value: 0
- description: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
name: MapTim2Tim15
value: 1
- description: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively
name: MapTim3Tim15
value: 2
enum/EXTI0:
bit_size: 4
variants:
- description: Select PA0 as the source input for the EXTI0 external interrupt
name: PA0
value: 0
- description: Select PB0 as the source input for the EXTI0 external interrupt
name: PB0
value: 1
- description: Select PC0 as the source input for the EXTI0 external interrupt
name: PC0
value: 2
- description: Select PD0 as the source input for the EXTI0 external interrupt
name: PD0
value: 3
- description: Select PE0 as the source input for the EXTI0 external interrupt
name: PE0
value: 4
- description: Select PF0 as the source input for the EXTI0 external interrupt
name: PF0
value: 5
enum/EXTI1:
bit_size: 4
variants:
- description: Select PA1 as the source input for the EXTI1 external interrupt
name: PA1
value: 0
- description: Select PB1 as the source input for the EXTI1 external interrupt
name: PB1
value: 1
- description: Select PC1 as the source input for the EXTI1 external interrupt
name: PC1
value: 2
- description: Select PD1 as the source input for the EXTI1 external interrupt
name: PD1
value: 3
- description: Select PE1 as the source input for the EXTI1 external interrupt
name: PE1
value: 4
- description: Select PF1 as the source input for the EXTI1 external interrupt
name: PF1
value: 5
enum/EXTI10:
bit_size: 4
variants:
- description: Select PA10 as the source input for the EXTI10 external interrupt
name: PA10
value: 0
- description: Select PB10 as the source input for the EXTI10 external interrupt
name: PB10
value: 1
- description: Select PC10 as the source input for the EXTI10 external interrupt
name: PC10
value: 2
- description: Select PD10 as the source input for the EXTI10 external interrupt
name: PD10
value: 3
- description: Select PE10 as the source input for the EXTI10 external interrupt
name: PE10
value: 4
- description: Select PF10 as the source input for the EXTI10 external interrupt
name: PF10
value: 5
enum/EXTI11:
bit_size: 4
variants:
- description: Select PA11 as the source input for the EXTI11 external interrupt
name: PA11
value: 0
- description: Select PB11 as the source input for the EXTI11 external interrupt
name: PB11
value: 1
- description: Select PC11 as the source input for the EXTI11 external interrupt
name: PC11
value: 2
- description: Select PD11 as the source input for the EXTI11 external interrupt
name: PD11
value: 3
- description: Select PE11 as the source input for the EXTI11 external interrupt
name: PE11
value: 4
enum/EXTI12:
bit_size: 4
variants:
- description: Select PA12 as the source input for the EXTI12 external interrupt
name: PA12
value: 0
- description: Select PB12 as the source input for the EXTI12 external interrupt
name: PB12
value: 1
- description: Select PC12 as the source input for the EXTI12 external interrupt
name: PC12
value: 2
- description: Select PD12 as the source input for the EXTI12 external interrupt
name: PD12
value: 3
- description: Select PE12 as the source input for the EXTI12 external interrupt
name: PE12
value: 4
enum/EXTI13:
bit_size: 4
variants:
- description: Select PA13 as the source input for the EXTI13 external interrupt
name: PA13
value: 0
- description: Select PB13 as the source input for the EXTI13 external interrupt
name: PB13
value: 1
- description: Select PC13 as the source input for the EXTI13 external interrupt
name: PC13
value: 2
- description: Select PD13 as the source input for the EXTI13 external interrupt
name: PD13
value: 3
- description: Select PE13 as the source input for the EXTI13 external interrupt
name: PE13
value: 4
enum/EXTI14:
bit_size: 4
variants:
- description: Select PA14 as the source input for the EXTI14 external interrupt
name: PA14
value: 0
- description: Select PB14 as the source input for the EXTI14 external interrupt
name: PB14
value: 1
- description: Select PC14 as the source input for the EXTI14 external interrupt
name: PC14
value: 2
- description: Select PD14 as the source input for the EXTI14 external interrupt
name: PD14
value: 3
- description: Select PE14 as the source input for the EXTI14 external interrupt
name: PE14
value: 4
enum/EXTI15:
bit_size: 4
variants:
- description: Select PA15 as the source input for the EXTI15 external interrupt
name: PA15
value: 0
- description: Select PB15 as the source input for the EXTI15 external interrupt
name: PB15
value: 1
- description: Select PC15 as the source input for the EXTI15 external interrupt
name: PC15
value: 2
- description: Select PD15 as the source input for the EXTI15 external interrupt
name: PD15
value: 3
- description: Select PE15 as the source input for the EXTI15 external interrupt
name: PE15
value: 4
enum/EXTI2:
bit_size: 4
variants:
- description: Select PA2 as the source input for the EXTI2 external interrupt
name: PA2
value: 0
- description: Select PB2 as the source input for the EXTI2 external interrupt
name: PB2
value: 1
- description: Select PC2 as the source input for the EXTI2 external interrupt
name: PC2
value: 2
- description: Select PD2 as the source input for the EXTI2 external interrupt
name: PD2
value: 3
- description: Select PE2 as the source input for the EXTI2 external interrupt
name: PE2
value: 4
- description: Select PF2 as the source input for the EXTI2 external interrupt
name: PF2
value: 5
enum/EXTI3:
bit_size: 4
variants:
- description: Select PA3 as the source input for the EXTI3 external interrupt
name: PA3
value: 0
- description: Select PB3 as the source input for the EXTI3 external interrupt
name: PB3
value: 1
- description: Select PC3 as the source input for the EXTI3 external interrupt
name: PC3
value: 2
- description: Select PD3 as the source input for the EXTI3 external interrupt
name: PD3
value: 3
- description: Select PE3 as the source input for the EXTI3 external interrupt
name: PE3
value: 4
enum/EXTI4:
bit_size: 4
variants:
- description: Select PA4 as the source input for the EXTI4 external interrupt
name: PA4
value: 0
- description: Select PB4 as the source input for the EXTI4 external interrupt
name: PB4
value: 1
- description: Select PC4 as the source input for the EXTI4 external interrupt
name: PC4
value: 2
- description: Select PD4 as the source input for the EXTI4 external interrupt
name: PD4
value: 3
- description: Select PE4 as the source input for the EXTI4 external interrupt
name: PE4
value: 4
- description: Select PF4 as the source input for the EXTI4 external interrupt
name: PF4
value: 5
enum/EXTI5:
bit_size: 4
variants:
- description: Select PA5 as the source input for the EXTI5 external interrupt
name: PA5
value: 0
- description: Select PB5 as the source input for the EXTI5 external interrupt
name: PB5
value: 1
- description: Select PC5 as the source input for the EXTI5 external interrupt
name: PC5
value: 2
- description: Select PD5 as the source input for the EXTI5 external interrupt
name: PD5
value: 3
- description: Select PE5 as the source input for the EXTI5 external interrupt
name: PE5
value: 4
- description: Select PF5 as the source input for the EXTI5 external interrupt
name: PF5
value: 5
enum/EXTI6:
bit_size: 4
variants:
- description: Select PA6 as the source input for the EXTI6 external interrupt
name: PA6
value: 0
- description: Select PB6 as the source input for the EXTI6 external interrupt
name: PB6
value: 1
- description: Select PC6 as the source input for the EXTI6 external interrupt
name: PC6
value: 2
- description: Select PD6 as the source input for the EXTI6 external interrupt
name: PD6
value: 3
- description: Select PE6 as the source input for the EXTI6 external interrupt
name: PE6
value: 4
- description: Select PF6 as the source input for the EXTI6 external interrupt
name: PF6
value: 5
enum/EXTI7:
bit_size: 4
variants:
- description: Select PA7 as the source input for the EXTI7 external interrupt
name: PA7
value: 0
- description: Select PB7 as the source input for the EXTI7 external interrupt
name: PB7
value: 1
- description: Select PC7 as the source input for the EXTI7 external interrupt
name: PC7
value: 2
- description: Select PD7 as the source input for the EXTI7 external interrupt
name: PD7
value: 3
- description: Select PE7 as the source input for the EXTI7 external interrupt
name: PE7
value: 4
enum/EXTI8:
bit_size: 4
variants:
- description: Select PA8 as the source input for the EXTI8 external interrupt
name: PA8
value: 0
- description: Select PB8 as the source input for the EXTI8 external interrupt
name: PB8
value: 1
- description: Select PC8 as the source input for the EXTI8 external interrupt
name: PC8
value: 2
- description: Select PD8 as the source input for the EXTI8 external interrupt
name: PD8
value: 3
- description: Select PE8 as the source input for the EXTI8 external interrupt
name: PE8
value: 4
enum/EXTI9:
bit_size: 4
variants:
- description: Select PA9 as the source input for the EXTI9 external interrupt
name: PA9
value: 0
- description: Select PB9 as the source input for the EXTI9 external interrupt
name: PB9
value: 1
- description: Select PC9 as the source input for the EXTI9 external interrupt
name: PC9
value: 2
- description: Select PD9 as the source input for the EXTI9 external interrupt
name: PD9
value: 3
- description: Select PE9 as the source input for the EXTI9 external interrupt
name: PE9
value: 4
- description: Select PF9 as the source input for the EXTI9 external interrupt
name: PF9
value: 5
enum/FPU_IE0:
bit_size: 1
variants:
- description: Invalid operation interrupt disable
name: Disabled
value: 0
- description: Invalid operation interrupt enable
name: Enabled
value: 1
enum/FPU_IE1:
bit_size: 1
variants:
- description: Devide-by-zero interrupt disable
name: Disabled
value: 0
- description: Devide-by-zero interrupt enable
name: Enabled
value: 1
enum/FPU_IE2:
bit_size: 1
variants:
- description: Underflow interrupt disable
name: Disabled
value: 0
- description: Underflow interrupt enable
name: Enabled
value: 1
enum/FPU_IE3:
bit_size: 1
variants:
- description: Overflow interrupt disable
name: Disabled
value: 0
- description: Overflow interrupt enable
name: Enabled
value: 1
enum/FPU_IE4:
bit_size: 1
variants:
- description: Input denormal interrupt disable
name: Disabled
value: 0
- description: Input denormal interrupt enable
name: Enabled
value: 1
enum/FPU_IE5:
bit_size: 1
variants:
- description: Inexact interrupt disable
name: Disabled
value: 0
- description: Inexact interrupt enable
name: Enabled
value: 1
enum/I2C1_FMP:
bit_size: 1
variants:
- description: FM+ mode is controlled by I2C_Pxx_FMP bits only
name: Standard
value: 0
- description: FM+ mode is enabled on all I2C1 pins selected through selection through
IOPORT control registers AF selection bits
name: FMP
value: 1
enum/I2C1_RX_DMA_RMP:
bit_size: 2
variants:
- description: I2C1_RX mapped on DMA1 CH7
name: MapDma1Ch7
value: 0
- description: I2C1_RX mapped on DMA1 CH3
name: MapDma1Ch3
value: 1
- description: I2C1_RX mapped on DMA1 CH5
name: MapDma1Ch5
value: 2
enum/I2C1_TX_DMA_RMP:
bit_size: 2
variants:
- description: I2C1_TX mapped on DMA1 CH6
name: MapDma1Ch6
value: 0
- description: I2C1_TX mapped on DMA1 CH2
name: MapDma1Ch2
value: 1
- description: I2C1_TX mapped on DMA1 CH4
name: MapDma1Ch4
value: 2
enum/I2C2_FMP:
bit_size: 1
variants:
- description: FM+ mode is controlled by I2C_Pxx_FMP bits only
name: Standard
value: 0
- description: FM+ mode is enabled on all I2C2 pins selected through selection through
IOPORT control registers AF selection bits
name: FMP
value: 1
enum/I2C3_FMP:
bit_size: 1
variants:
- description: FM+ mode is controlled by I2C_Pxx_FMP bits only
name: Standard
value: 0
- description: FM+ mode is enabled on all I2C3 pins selected through selection trhough
IOPORT control registers AF selection bits
name: FMP
value: 1
enum/I2C_PB6_FMP:
bit_size: 1
variants:
- description: PB6 pin operate in standard mode
name: Standard
value: 0
- description: I2C FM+ mode enabled on PB6 and the Speed control is bypassed
name: FMP
value: 1
enum/I2C_PB7_FMP:
bit_size: 1
variants:
- description: PB7 pin operate in standard mode
name: Standard
value: 0
- description: I2C FM+ mode enabled on PB7 and the Speed control is bypassed
name: FMP
value: 1
enum/I2C_PB8_FMP:
bit_size: 1
variants:
- description: PB8 pin operate in standard mode
name: Standard
value: 0
- description: I2C FM+ mode enabled on PB8 and the Speed control is bypassed
name: FMP
value: 1
enum/I2C_PB9_FMP:
bit_size: 1
variants:
- description: PB9 pin operate in standard mode
name: Standard
value: 0
- description: I2C FM+ mode enabled on PB9 and the Speed control is bypassed
name: FMP
value: 1
enum/LOCKUP_LOCK:
bit_size: 1
variants:
- description: Cortex-M4 LOCKUP output disconnected from TIM1/15/16/17 Break inputs
and HRTIM1 SYSFLT.
name: Disconnected
value: 0
- description: Cortex-M4 LOCKUP output connected to TIM1/15/16/17 and HRTIM1 SYSFLT
Break inputs
name: Connected
value: 1
enum/MEM_MODE:
bit_size: 2
variants:
- description: Main Flash memory mapped at 0x0000_0000
name: MainFlash
value: 0
- description: System Flash memory mapped at 0x0000_0000
name: SystemFlash
value: 1
- description: Main Flash memory mapped at 0x0000_0000
name: MainFlash2
value: 2
- description: Embedded SRAM mapped at 0x0000_0000
name: SRAM
value: 3
enum/PAGE0_WP:
bit_size: 1
variants:
- description: Write protection of pagex is disabled
name: Disabled
value: 0
- description: Write protection of pagex is enabled
name: Enabled
value: 1
enum/PVD_LOCK:
bit_size: 1
variants:
- description: PVD interrupt disconnected from TIM15/16/17 Break input
name: Disconnected
value: 0
- description: PVD interrupt connected to TIM15/16/17 Break input
name: Connected
value: 1
enum/SPI1_RX_DMA_RMP:
bit_size: 2
variants:
- description: SPI1_RX mapped on DMA1 CH2
name: MapDma1Ch3
value: 0
- description: SPI1_RX mapped on DMA1 CH4
name: MapDma1Ch5
value: 1
- description: SPI1_RX mapped on DMA1 CH6
name: MapDma1Ch7
value: 2
enum/SPI1_TX_DMA_RMP:
bit_size: 2
variants:
- description: SPI1_TX mapped on DMA1 CH3
name: MapDma1Ch3
value: 0
- description: SPI1_TX mapped on DMA1 CH5
name: MapDma1Ch5
value: 1
- description: SPI1_TX mapped on DMA1 CH7
name: MapDma1Ch7
value: 2
enum/SRAM_PARITY_LOCK:
bit_size: 1
variants:
- description: SRAM parity error signal disconnected from TIM1/15/16/17 and HRTIM1
SYSFLT Break inputs
name: Disconnected
value: 0
- description: SRAM parity error signal connected to TIM1/15/16/17 and HRTIM1 SYSFLT
Break inputs
name: Connected
value: 1
enum/SRAM_PEFR:
bit_size: 1
variants:
- description: No SRAM parity error detected
name: NoParityError
value: 0
- description: SRAM parity error detected
name: ParityErrorDetected
value: 1
enum/SRAM_PEFW:
bit_size: 1
variants:
- description: Clear SRAM parity error flag
name: Clear
value: 1
enum/TIM16_DMA_RMP:
bit_size: 1
variants:
- description: TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 3
name: NotRemapped
value: 0
- description: TIM16_CH1 and TIM16_UP DMA requests mapped on DMA channel 4
name: Remapped
value: 1
enum/TIM17_DMA_RMP:
bit_size: 1
variants:
- description: TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 1
name: NotRemapped
value: 0
- description: TIM17_CH1 and TIM17_UP DMA requests mapped on DMA channel 2
name: Remapped
value: 1
enum/TIM18_DAC2_OUT1_DMA_RMP:
bit_size: 1
variants:
- description: TIM18 and DAC2_OUT1 DMA requests mapped on DMA2 channel 5
name: NotRemapped
value: 0
- description: TIM18 and DAC2_OUT1 DMA requests mapped on DMA1 channel 5
name: Remapped
value: 1
enum/TIM1_ITR3_RMP:
bit_size: 1
variants:
- description: Not remapped
name: NotRemapped
value: 0
- description: TIM1_ITR3 = TIM17_OC
name: Remapped
value: 1
enum/TIM6_DAC1_CH1_DMA_RMP:
bit_size: 1
variants:
- description: TIM6_UP and DAC_CH1 DMA requests mapped on DMA2 channel 3
name: NotRemapped
value: 0
- description: TIM6_UP and DAC_CH1 DMA requests mapped on DMA1 channel 3
name: Remapped
value: 1
enum/TIM6_DAC1_DMA_RMP:
bit_size: 1
variants:
- description: TIM6_UP and DAC_CH1 DMA requests mapped on DMA2 channel 3
name: NotRemapped
value: 0
- description: TIM6_UP and DAC_CH1 DMA requests mapped on DMA1 channel 3
name: Remapped
value: 1
enum/TIM6_DAC1_OUT1_DMA_RMP:
bit_size: 1
variants:
- description: TIM7 and DAC1_OUT1 DMA requests mapped on DMA2 channel 3
name: NotRemapped
value: 0
- description: TIM7 and DAC1_OUT1 DMA requests mapped on DMA1 channel 3
name: Remapped
value: 1
enum/TIM7_DAC1_CH2_DMA_RMP:
bit_size: 1
variants:
- description: Not remapped
name: NotRemapped
value: 0
- description: TIM7_UP and DAC_CH2 DMA requests mapped on DMA1 channel 4
name: Remapped
value: 1
enum/TIM7_DAC1_OUT2_DMA_RMP:
bit_size: 1
variants:
- description: TIM7 and DAC1_OUT2 DMA requests mapped on DMA2 channel 4
name: NotRemapped
value: 0
- description: TIM7 and DAC1_OUT2 DMA requests mapped on DMA1 channel 4
name: Remapped
value: 1
enum/USB_IT_RMP:
bit_size: 1
variants:
- description: USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt
lines 19, 20 and 42 respectively
name: NotRemapped
value: 0
- description: USB_HP, USB_LP and USB_WAKEUP interrupts are mapped on interrupt
lines 74, 75 and 76 respectively
name: Remapped
value: 1
enum/VBAT_MON:
bit_size: 1
variants:
- description: Disable the power switch to not deliver VBAT voltage on ADC channel
18 input
name: Disable
value: 0
- description: Enable the power switch to deliver VBAT voltage on ADC channel 18
input
name: Enable
value: 1
fieldset/CFGR1:
description: configuration register 1
fields:
- bit_offset: 0
bit_size: 2
description: Memory mapping selection bits
enum: MEM_MODE
name: MEM_MODE
- bit_offset: 5
bit_size: 1
description: USB interrupt remap
enum: USB_IT_RMP
name: USB_IT_RMP
- bit_offset: 6
bit_size: 1
description: Timer 1 ITR3 selection
enum: TIM1_ITR3_RMP
name: TIM1_ITR3_RMP
- bit_offset: 7
bit_size: 1
description: DAC trigger remap (when TSEL = 001)
enum: DAC_TRIG_RMP
name: DAC_TRIG_RMP
- bit_offset: 7
bit_size: 1
description: DAC trigger remap (when TSEL = 001)
enum: DAC1_TRIG_RMP
name: DAC1_TRIG_RMP
- bit_offset: 8
bit_size: 1
description: ADC24 DMA remapping bit
enum: ADC2_DMA_RMP
name: ADC2_DMA_RMP
- bit_offset: 11
bit_size: 1
description: TIM16 DMA request remapping bit
enum: TIM16_DMA_RMP
name: TIM16_DMA_RMP
- bit_offset: 12
bit_size: 1
description: TIM17 DMA request remapping bit
enum: TIM17_DMA_RMP
name: TIM17_DMA_RMP
- bit_offset: 13
bit_size: 1
description: TIM6 and DAC1 DMA request remapping bit
enum: TIM6_DAC1_CH1_DMA_RMP
name: TIM6_DAC1_CH1_DMA_RMP
- bit_offset: 13
bit_size: 1
description: TIM6 and DAC1 DMA request remapping bit
enum: TIM6_DAC1_DMA_RMP
name: TIM6_DAC1_DMA_RMP
- bit_offset: 13
bit_size: 1
description: TIM6 and DAC1 DMA request remapping bit
enum: TIM6_DAC1_OUT1_DMA_RMP
name: TIM6_DAC1_OUT1_DMA_RMP
- bit_offset: 14
bit_size: 1
description: TIM7 and DAC2 DMA request remapping bit
enum: TIM7_DAC1_CH2_DMA_RMP
name: TIM7_DAC1_CH2_DMA_RMP
- bit_offset: 14
bit_size: 1
description: TIM7 and DAC2 DMA request remapping bit
enum: TIM7_DAC1_OUT2_DMA_RMP
name: TIM7_DAC1_OUT2_DMA_RMP
- bit_offset: 15
bit_size: 1
description: DAC2 channel1 DMA remap
enum: DAC2_CH1_DMA_RMP
name: DAC2_CH1_DMA_RMP
- bit_offset: 15
bit_size: 1
description: TIM18 and DAC2_OUT1 DMA request remapping bit
enum: TIM18_DAC2_OUT1_DMA_RMP
name: TIM18_DAC2_OUT1_DMA_RMP
- bit_offset: 16
bit_size: 1
description: Fast Mode Plus (FM+) driving capability activation bits.
enum: I2C_PB6_FMP
name: I2C_PB6_FMP
- bit_offset: 17
bit_size: 1
description: Fast Mode Plus (FM+) driving capability activation bits.
enum: I2C_PB7_FMP
name: I2C_PB7_FMP
- bit_offset: 18
bit_size: 1
description: Fast Mode Plus (FM+) driving capability activation bits.
enum: I2C_PB8_FMP
name: I2C_PB8_FMP
- bit_offset: 19
bit_size: 1
description: Fast Mode Plus (FM+) driving capability activation bits.
enum: I2C_PB9_FMP
name: I2C_PB9_FMP
- bit_offset: 20
bit_size: 1
description: I2C1 Fast Mode Plus
enum: I2C1_FMP
name: I2C1_FMP
- bit_offset: 21
bit_size: 1
description: I2C2 Fast Mode Plus
enum: I2C2_FMP
name: I2C2_FMP
- bit_offset: 22
bit_size: 2
description: Encoder mode
enum: ENCODER_MODE
name: ENCODER_MODE
- bit_offset: 24
bit_size: 1
description: I2C3 Fast Mode Plus
enum: I2C3_FMP
name: I2C3_FMP
- bit_offset: 24
bit_size: 1
description: VBAT monitoring enable
enum: VBAT_MON
name: VBAT_MON
- bit_offset: 26
bit_size: 1
description: Invalid operation interrupt enable
enum: FPU_IE0
name: FPU_IE0
- bit_offset: 27
bit_size: 1
description: Devide-by-zero interrupt enable
enum: FPU_IE1
name: FPU_IE1
- bit_offset: 28
bit_size: 1
description: Underflow interrupt enable
enum: FPU_IE2
name: FPU_IE2
- bit_offset: 29
bit_size: 1
description: Overflow interrupt enable
enum: FPU_IE3
name: FPU_IE3
- bit_offset: 30
bit_size: 1
description: Input denormal interrupt enable
enum: FPU_IE4
name: FPU_IE4
- bit_offset: 31
bit_size: 1
description: Inexact interrupt enable
enum: FPU_IE5
name: FPU_IE5
fieldset/CFGR2:
description: configuration register 2
fields:
- bit_offset: 0
bit_size: 1
description: Cortex-M0 LOCKUP bit enable bit
enum: LOCKUP_LOCK
name: LOCKUP_LOCK
- bit_offset: 1
bit_size: 1
description: SRAM parity lock bit
enum: SRAM_PARITY_LOCK
name: SRAM_PARITY_LOCK
- bit_offset: 2
bit_size: 1
description: PVD lock enable bit
enum: PVD_LOCK
name: PVD_LOCK
- bit_offset: 4
bit_size: 1
description: Bypass address bit 29 in parity calculation
enum: BYP_ADDR_PAR
name: BYP_ADDR_PAR
- bit_offset: 8
bit_size: 1
description: SRAM parity flag
enum_read: SRAM_PEFR
enum_write: SRAM_PEFW
name: SRAM_PEF
fieldset/CFGR3:
description: configuration register 3
fields:
- bit_offset: 0
bit_size: 2
description: SPI1_RX DMA remapping bit
enum: SPI1_RX_DMA_RMP
name: SPI1_RX_DMA_RMP
- bit_offset: 2
bit_size: 2
description: SPI1_TX DMA remapping bit
enum: SPI1_TX_DMA_RMP
name: SPI1_TX_DMA_RMP
- bit_offset: 4
bit_size: 2
description: I2C1_RX DMA remapping bit
enum: I2C1_RX_DMA_RMP
name: I2C1_RX_DMA_RMP
- bit_offset: 6
bit_size: 2
description: I2C1_TX DMA remapping bit
enum: I2C1_TX_DMA_RMP
name: I2C1_TX_DMA_RMP
- bit_offset: 8
bit_size: 2
description: ADC2 DMA remapping bit
enum: ADC2_DMA_RMP
name: ADC2_DMA_RMP
- bit_offset: 16
bit_size: 1
description: DAC1_CH1 / DAC1_CH2 Trigger remap
enum: DAC1_TRIG3_RMP
name: DAC1_TRIG3_RMP
- bit_offset: 17
bit_size: 1
description: DAC1_CH1 / DAC1_CH2 Trigger remap
enum: DAC1_TRIG5_RMP
name: DAC1_TRIG5_RMP
fieldset/CFGR4:
description: configuration register 4
fields:
- bit_offset: 0
bit_size: 1
description: Controls the Input trigger of ADC12 regular channel EXT2
enum: ADC12_EXT2_RMP
name: ADC12_EXT2_RMP
- bit_offset: 1
bit_size: 1
description: Controls the Input trigger of ADC12 regular channel EXT3
enum: ADC12_EXT3_RMP
name: ADC12_EXT3_RMP
- bit_offset: 2
bit_size: 1
description: Controls the Input trigger of ADC12 regular channel EXT5
enum: ADC12_EXT5_RMP
name: ADC12_EXT5_RMP
- bit_offset: 3
bit_size: 1
description: Controls the Input trigger of ADC12 regular channel EXT13
enum: ADC12_EXT13_RMP
name: ADC12_EXT13_RMP
- bit_offset: 4
bit_size: 1
description: Controls the Input trigger of ADC12 regular channel EXT15
enum: ADC12_EXT15_RMP
name: ADC12_EXT15_RMP
- bit_offset: 5
bit_size: 1
description: Controls the Input trigger of ADC12 injected channel JEXT3
enum: ADC12_JEXT3_RMP
name: ADC12_JEXT3_RMP
- bit_offset: 6
bit_size: 1
description: Controls the Input trigger of ADC12 injected channel JEXT6
enum: ADC12_JEXT6_RMP
name: ADC12_JEXT6_RMP
- bit_offset: 7
bit_size: 1
description: Controls the Input trigger of ADC12 injected channel JEXT13
enum: ADC12_JEXT13_RMP
name: ADC12_JEXT13_RMP
- bit_offset: 8
bit_size: 1
description: Controls the Input trigger of ADC34 regular channel EXT5
enum: ADC34_EXT5_RMP
name: ADC34_EXT5_RMP
- bit_offset: 9
bit_size: 1
description: Controls the Input trigger of ADC34 regular channel EXT6
enum: ADC34_EXT6_RMP
name: ADC34_EXT6_RMP
- bit_offset: 10
bit_size: 1
description: Controls the Input trigger of ADC34 regular channel EXT15
enum: ADC34_EXT15_RMP
name: ADC34_EXT15_RMP
- bit_offset: 11
bit_size: 1
description: Controls the Input trigger of ADC34 injected channel JEXT5
enum: ADC34_JEXT5_RMP
name: ADC34_JEXT5_RMP
- bit_offset: 12
bit_size: 1
description: Controls the Input trigger of ADC34 injected channel JEXT11
enum: ADC34_JEXT11_RMP
name: ADC34_JEXT11_RMP
- bit_offset: 13
bit_size: 1
description: Controls the Input trigger of ADC34 injected channel JEXT14
enum: ADC34_JEXT14_RMP
name: ADC34_JEXT14_RMP
fieldset/EXTICR:
description: external interrupt configuration register
fields:
- bit_offset: 0
bit_size: 4
description: EXTI x configuration
name: EXTI
array:
len: 4
stride: 4
fieldset/RCR:
description: CCM SRAM protection register
fields:
- bit_offset: 0
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE0_WP
- bit_offset: 1
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE1_WP
- bit_offset: 2
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE2_WP
- bit_offset: 3
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE3_WP
- bit_offset: 4
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE4_WP
- bit_offset: 5
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE5_WP
- bit_offset: 6
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE6_WP
- bit_offset: 7
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE7_WP
- bit_offset: 8
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE8_WP
- bit_offset: 9
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE9_WP
- bit_offset: 10
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE10_WP
- bit_offset: 11
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE11_WP
- bit_offset: 12
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE12_WP
- bit_offset: 13
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE13_WP
- bit_offset: 14
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE14_WP
- bit_offset: 15
bit_size: 1
description: CCM SRAM page write protection bit
enum: PAGE0_WP
name: PAGE15_WP
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