27c71ac451
this is a special case, as most data sources don't mention this as a separate peripheral at all, and those that do don't handle the offsets in the case of multiple FDCANS H7 chips have a single 10KB block shared between all FDCANs
11 lines
186 B
YAML
11 lines
186 B
YAML
block/FDCANRAM:
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description: FDCAN Message RAM
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items:
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- name: RAM
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description: FDCAN Message RAM
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array:
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len: 2560
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stride: 4
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byte_offset: 0
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bit_size: 32
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