stm32-data/data/registers/syscfg_u5.yaml
Dario Nieuwenhuis 86fb0cfc2f chiptool fmt.
2023-09-16 02:34:03 +02:00

241 lines
5.2 KiB
YAML

block/SYSCFG:
description: System configuration controller
items:
- name: SECCFGR
description: "SYSCFG secure configuration\r register"
byte_offset: 0
fieldset: SECCFGR
- name: CFGR1
description: configuration register 1
byte_offset: 4
fieldset: CFGR1
- name: FPUIMR
description: FPU interrupt mask register
byte_offset: 8
fieldset: FPUIMR
- name: CNSLCKR
description: "SYSCFG CPU non-secure lock\r register"
byte_offset: 12
fieldset: CNSLCKR
- name: CSLOCKR
description: "SYSCFG CPU secure lock\r register"
byte_offset: 16
fieldset: CSLOCKR
- name: CFGR2
description: configuration register 2
byte_offset: 20
fieldset: CFGR2
- name: MESR
description: memory erase status register
byte_offset: 24
fieldset: MESR
- name: CCCSR
description: compensation cell control/status register
byte_offset: 28
fieldset: CCCSR
- name: CCVR
description: compensation cell value register
byte_offset: 32
access: Read
fieldset: CCVR
- name: CCCR
description: compensation cell code register
byte_offset: 36
fieldset: CCCR
- name: RSSCMDR
description: RSS command register
byte_offset: 44
fieldset: RSSCMDR
- name: UCPDR
description: USB Type C and Power Delivery register
byte_offset: 112
fieldset: UCPDR
fieldset/CCCR:
description: compensation cell code register
fields:
- name: NCC1
description: NCC1
bit_offset: 0
bit_size: 4
- name: PCC1
description: PCC1
bit_offset: 4
bit_size: 4
- name: NCC2
description: NCC2
bit_offset: 8
bit_size: 4
- name: PCC2
description: PCC2
bit_offset: 12
bit_size: 4
fieldset/CCCSR:
description: compensation cell control/status register
fields:
- name: EN1
description: EN1
bit_offset: 0
bit_size: 1
- name: CS1
description: CS1
bit_offset: 1
bit_size: 1
- name: EN2
description: EN2
bit_offset: 2
bit_size: 1
- name: CS2
description: CS2
bit_offset: 3
bit_size: 1
- name: RDY1
description: RDY1
bit_offset: 8
bit_size: 1
- name: RDY2
description: RDY2
bit_offset: 9
bit_size: 1
fieldset/CCVR:
description: compensation cell value register
fields:
- name: NCV1
description: NCV1
bit_offset: 0
bit_size: 4
- name: PCV1
description: PCV1
bit_offset: 4
bit_size: 4
- name: NCV2
description: NCV2
bit_offset: 8
bit_size: 4
- name: PCV2
description: PCV2
bit_offset: 12
bit_size: 4
fieldset/CFGR1:
description: configuration register 1
fields:
- name: BOOSTEN
description: "I/O analog switch voltage booster\r enable"
bit_offset: 8
bit_size: 1
- name: ANASWVDD
description: "GPIO analog switch control voltage\r selection"
bit_offset: 9
bit_size: 1
- name: PB6_FMP
description: PB6_FMP
bit_offset: 16
bit_size: 1
- name: PB7_FMP
description: PB7_FMP
bit_offset: 17
bit_size: 1
- name: PB8_FMP
description: PB8_FMP
bit_offset: 18
bit_size: 1
- name: PB9_FMP
description: PB9_FMP
bit_offset: 19
bit_size: 1
fieldset/CFGR2:
description: configuration register 2
fields:
- name: CLL
description: "LOCKUP (hardfault) output enable\r bit"
bit_offset: 0
bit_size: 1
- name: SPL
description: SRAM ECC lock bit
bit_offset: 1
bit_size: 1
- name: PVDL
description: PVD lock enable bit
bit_offset: 2
bit_size: 1
- name: ECCL
description: ECC Lock
bit_offset: 3
bit_size: 1
fieldset/CNSLCKR:
description: "SYSCFG CPU non-secure lock\r register"
fields:
- name: LOCKNSVTOR
description: VTOR_NS register lock
bit_offset: 0
bit_size: 1
- name: LOCKNSMPU
description: "Non-secure MPU registers\r lock"
bit_offset: 1
bit_size: 1
fieldset/CSLOCKR:
description: "SYSCFG CPU secure lock\r register"
fields:
- name: LOCKSVTAIRCR
description: LOCKSVTAIRCR
bit_offset: 0
bit_size: 1
- name: LOCKSMPU
description: LOCKSMPU
bit_offset: 1
bit_size: 1
- name: LOCKSAU
description: LOCKSAU
bit_offset: 2
bit_size: 1
fieldset/FPUIMR:
description: FPU interrupt mask register
fields:
- name: FPU_IE
description: "Floating point unit interrupts enable\r bits"
bit_offset: 0
bit_size: 6
fieldset/MESR:
description: memory erase status register
fields:
- name: MCLR
description: MCLR
bit_offset: 0
bit_size: 1
- name: IPMEE
description: IPMEE
bit_offset: 16
bit_size: 1
fieldset/RSSCMDR:
description: RSS command register
fields:
- name: RSSCMD
description: RSS commands
bit_offset: 0
bit_size: 16
fieldset/SECCFGR:
description: "SYSCFG secure configuration\r register"
fields:
- name: SYSCFGSEC
description: "SYSCFG clock control\r security"
bit_offset: 0
bit_size: 1
- name: CLASSBSEC
description: CLASSBSEC
bit_offset: 1
bit_size: 1
- name: FPUSEC
description: FPUSEC
bit_offset: 3
bit_size: 1
fieldset/UCPDR:
description: USB Type C and Power Delivery register
fields:
- name: CC1ENRXFILTER
description: CC1ENRXFILTER
bit_offset: 0
bit_size: 1
- name: CC2ENRXFILTER
description: CC2ENRXFILTER
bit_offset: 1
bit_size: 1