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stm32-data/data/registers/ltdc_v1.yaml
Dario Nieuwenhuis 86fb0cfc2f chiptool fmt.
2023-09-16 02:34:03 +02:00

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block/LAYER:
description: Cluster LAYER%s, containing L?CR, L?WHPCR, L?WVPCR, L?CKCR, L?PFCR, L?CACR, L?DCCR, L?BFCR, L?CFBAR, L?CFBLR, L?CFBLNR, L?CLUTWR
items:
- name: CR
description: Layerx Control Register
byte_offset: 0
fieldset: CR
- name: WHPCR
description: Layerx Window Horizontal Position Configuration Register
byte_offset: 4
fieldset: WHPCR
- name: WVPCR
description: Layerx Window Vertical Position Configuration Register
byte_offset: 8
fieldset: WVPCR
- name: CKCR
description: Layerx Color Keying Configuration Register
byte_offset: 12
fieldset: CKCR
- name: PFCR
description: Layerx Pixel Format Configuration Register
byte_offset: 16
fieldset: PFCR
- name: CACR
description: Layerx Constant Alpha Configuration Register
byte_offset: 20
fieldset: CACR
- name: DCCR
description: Layerx Default Color Configuration Register
byte_offset: 24
fieldset: DCCR
- name: BFCR
description: Layerx Blending Factors Configuration Register
byte_offset: 28
fieldset: BFCR
- name: CFBAR
description: Layerx Color Frame Buffer Address Register
byte_offset: 40
fieldset: CFBAR
- name: CFBLR
description: Layerx Color Frame Buffer Length Register
byte_offset: 44
fieldset: CFBLR
- name: CFBLNR
description: Layerx ColorFrame Buffer Line Number Register
byte_offset: 48
fieldset: CFBLNR
- name: CLUTWR
description: Layerx CLUT Write Register
byte_offset: 64
access: Write
fieldset: CLUTWR
block/LTDC:
description: LCD-TFT Controller
items:
- name: SSCR
description: Synchronization Size Configuration Register
byte_offset: 8
fieldset: SSCR
- name: BPCR
description: Back Porch Configuration Register
byte_offset: 12
fieldset: BPCR
- name: AWCR
description: Active Width Configuration Register
byte_offset: 16
fieldset: AWCR
- name: TWCR
description: Total Width Configuration Register
byte_offset: 20
fieldset: TWCR
- name: GCR
description: Global Control Register
byte_offset: 24
fieldset: GCR
- name: SRCR
description: Shadow Reload Configuration Register
byte_offset: 36
fieldset: SRCR
- name: BCCR
description: Background Color Configuration Register
byte_offset: 44
fieldset: BCCR
- name: IER
description: Interrupt Enable Register
byte_offset: 52
fieldset: IER
- name: ISR
description: Interrupt Status Register
byte_offset: 56
access: Read
fieldset: ISR
- name: ICR
description: Interrupt Clear Register
byte_offset: 60
access: Write
fieldset: ICR
- name: LIPCR
description: Line Interrupt Position Configuration Register
byte_offset: 64
fieldset: LIPCR
- name: CPSR
description: Current Position Status Register
byte_offset: 68
access: Read
fieldset: CPSR
- name: CDSR
description: Current Display Status Register
byte_offset: 72
access: Read
fieldset: CDSR
- name: LAYER
description: Cluster LAYER%s, containing L?CR, L?WHPCR, L?WVPCR, L?CKCR, L?PFCR, L?CACR, L?DCCR, L?BFCR, L?CFBAR, L?CFBLR, L?CFBLNR, L?CLUTWR
array:
len: 2
stride: 128
byte_offset: 132
block: LAYER
fieldset/AWCR:
description: Active Width Configuration Register
fields:
- name: AAH
description: Accumulated Active Height (in units of horizontal scan line)
bit_offset: 0
bit_size: 11
- name: AAW
description: Accumulated Active Width (in units of pixel clock period)
bit_offset: 16
bit_size: 12
fieldset/BCCR:
description: Background Color Configuration Register
fields:
- name: BCBLUE
description: Background color blue value
bit_offset: 0
bit_size: 8
- name: BCGREEN
description: Background color green value
bit_offset: 8
bit_size: 8
- name: BCRED
description: Background color red value
bit_offset: 16
bit_size: 8
fieldset/BFCR:
description: Layerx Blending Factors Configuration Register
fields:
- name: BF
description: Blending Factor 2
bit_offset: 0
bit_size: 3
array:
len: 2
stride: 8
enum: BF2
fieldset/BPCR:
description: Back Porch Configuration Register
fields:
- name: AVBP
description: Accumulated Vertical back porch (in units of horizontal scan line)
bit_offset: 0
bit_size: 11
- name: AHBP
description: Accumulated Horizontal back porch (in units of pixel clock period)
bit_offset: 16
bit_size: 12
fieldset/CACR:
description: Layerx Constant Alpha Configuration Register
fields:
- name: CONSTA
description: Constant Alpha
bit_offset: 0
bit_size: 8
fieldset/CDSR:
description: Current Display Status Register
fields:
- name: VDES
description: Vertical Data Enable display Status
bit_offset: 0
bit_size: 1
enum: VDES
- name: HDES
description: Horizontal Data Enable display Status
bit_offset: 1
bit_size: 1
enum: HDES
- name: VSYNCS
description: Vertical Synchronization display Status
bit_offset: 2
bit_size: 1
enum: VSYNCS
- name: HSYNCS
description: Horizontal Synchronization display Status
bit_offset: 3
bit_size: 1
enum: HSYNCS
fieldset/CFBAR:
description: Layerx Color Frame Buffer Address Register
fields:
- name: CFBADD
description: Color Frame Buffer Start Address
bit_offset: 0
bit_size: 32
fieldset/CFBLNR:
description: Layerx ColorFrame Buffer Line Number Register
fields:
- name: CFBLNBR
description: Frame Buffer Line Number
bit_offset: 0
bit_size: 11
fieldset/CFBLR:
description: Layerx Color Frame Buffer Length Register
fields:
- name: CFBLL
description: Color Frame Buffer Line Length
bit_offset: 0
bit_size: 13
- name: CFBP
description: Color Frame Buffer Pitch in bytes
bit_offset: 16
bit_size: 13
fieldset/CKCR:
description: Layerx Color Keying Configuration Register
fields:
- name: CKBLUE
description: Color Key Blue value
bit_offset: 0
bit_size: 8
- name: CKGREEN
description: Color Key Green value
bit_offset: 8
bit_size: 8
- name: CKRED
description: Color Key Red value
bit_offset: 16
bit_size: 8
fieldset/CLUTWR:
description: Layerx CLUT Write Register
fields:
- name: BLUE
description: Blue value
bit_offset: 0
bit_size: 8
- name: GREEN
description: Green value
bit_offset: 8
bit_size: 8
- name: RED
description: Red value
bit_offset: 16
bit_size: 8
- name: CLUTADD
description: CLUT Address
bit_offset: 24
bit_size: 8
fieldset/CPSR:
description: Current Position Status Register
fields:
- name: CYPOS
description: Current Y Position
bit_offset: 0
bit_size: 16
- name: CXPOS
description: Current X Position
bit_offset: 16
bit_size: 16
fieldset/CR:
description: Layerx Control Register
fields:
- name: LEN
description: Layer Enable
bit_offset: 0
bit_size: 1
enum: LEN
- name: COLKEN
description: Color Keying Enable
bit_offset: 1
bit_size: 1
enum: COLKEN
- name: CLUTEN
description: Color Look-Up Table Enable
bit_offset: 4
bit_size: 1
enum: CLUTEN
fieldset/DCCR:
description: Layerx Default Color Configuration Register
fields:
- name: DCBLUE
description: Default Color Blue
bit_offset: 0
bit_size: 8
- name: DCGREEN
description: Default Color Green
bit_offset: 8
bit_size: 8
- name: DCRED
description: Default Color Red
bit_offset: 16
bit_size: 8
- name: DCALPHA
description: Default Color Alpha
bit_offset: 24
bit_size: 8
fieldset/GCR:
description: Global Control Register
fields:
- name: LTDCEN
description: LCD-TFT controller enable bit
bit_offset: 0
bit_size: 1
enum: LTDCEN
- name: DBW
description: Dither Blue Width
bit_offset: 4
bit_size: 3
- name: DGW
description: Dither Green Width
bit_offset: 8
bit_size: 3
- name: DRW
description: Dither Red Width
bit_offset: 12
bit_size: 3
- name: DEN
description: Dither Enable
bit_offset: 16
bit_size: 1
enum: DEN
- name: PCPOL
description: Pixel Clock Polarity
bit_offset: 28
bit_size: 1
enum: PCPOL
- name: DEPOL
description: Data Enable Polarity
bit_offset: 29
bit_size: 1
enum: DEPOL
- name: VSPOL
description: Vertical Synchronization Polarity
bit_offset: 30
bit_size: 1
enum: VSPOL
- name: HSPOL
description: Horizontal Synchronization Polarity
bit_offset: 31
bit_size: 1
enum: HSPOL
fieldset/ICR:
description: Interrupt Clear Register
fields:
- name: CLIF
description: Clears the Line Interrupt Flag
bit_offset: 0
bit_size: 1
enum: CLIF
- name: CFUIF
description: Clears the FIFO Underrun Interrupt flag
bit_offset: 1
bit_size: 1
enum: CFUIF
- name: CTERRIF
description: Clears the Transfer Error Interrupt Flag
bit_offset: 2
bit_size: 1
enum: CTERRIF
- name: CRRIF
description: Clears Register Reload Interrupt Flag
bit_offset: 3
bit_size: 1
enum: CRRIF
fieldset/IER:
description: Interrupt Enable Register
fields:
- name: LIE
description: Line Interrupt Enable
bit_offset: 0
bit_size: 1
enum: LIE
- name: FUIE
description: FIFO Underrun Interrupt Enable
bit_offset: 1
bit_size: 1
enum: FUIE
- name: TERRIE
description: Transfer Error Interrupt Enable
bit_offset: 2
bit_size: 1
enum: TERRIE
- name: RRIE
description: Register Reload interrupt enable
bit_offset: 3
bit_size: 1
enum: RRIE
fieldset/ISR:
description: Interrupt Status Register
fields:
- name: LIF
description: Line Interrupt flag
bit_offset: 0
bit_size: 1
enum: LIF
- name: FUIF
description: FIFO Underrun Interrupt flag
bit_offset: 1
bit_size: 1
enum: FUIF
- name: TERRIF
description: Transfer Error interrupt flag
bit_offset: 2
bit_size: 1
enum: TERRIF
- name: RRIF
description: Register Reload Interrupt Flag
bit_offset: 3
bit_size: 1
enum: RRIF
fieldset/LIPCR:
description: Line Interrupt Position Configuration Register
fields:
- name: LIPOS
description: Line Interrupt Position
bit_offset: 0
bit_size: 11
fieldset/PFCR:
description: Layerx Pixel Format Configuration Register
fields:
- name: PF
description: Pixel Format
bit_offset: 0
bit_size: 3
enum: PF
fieldset/SRCR:
description: Shadow Reload Configuration Register
fields:
- name: IMR
description: Immediate Reload
bit_offset: 0
bit_size: 1
enum: IMR
- name: VBR
description: Vertical Blanking Reload
bit_offset: 1
bit_size: 1
enum: VBR
fieldset/SSCR:
description: Synchronization Size Configuration Register
fields:
- name: VSH
description: Vertical Synchronization Height (in units of horizontal scan line)
bit_offset: 0
bit_size: 11
- name: HSW
description: Horizontal Synchronization Width (in units of pixel clock period)
bit_offset: 16
bit_size: 12
fieldset/TWCR:
description: Total Width Configuration Register
fields:
- name: TOTALH
description: Total Height (in units of horizontal scan line)
bit_offset: 0
bit_size: 11
- name: TOTALW
description: Total Width (in units of pixel clock period)
bit_offset: 16
bit_size: 12
fieldset/WHPCR:
description: Layerx Window Horizontal Position Configuration Register
fields:
- name: WHSTPOS
description: Window Horizontal Start Position
bit_offset: 0
bit_size: 12
- name: WHSPPOS
description: Window Horizontal Stop Position
bit_offset: 16
bit_size: 12
fieldset/WVPCR:
description: Layerx Window Vertical Position Configuration Register
fields:
- name: WVSTPOS
description: Window Vertical Start Position
bit_offset: 0
bit_size: 11
- name: WVSPPOS
description: Window Vertical Stop Position
bit_offset: 16
bit_size: 11
enum/BF2:
bit_size: 3
variants:
- name: Constant
description: BF2 = 1 - constant alpha
value: 5
- name: Pixel
description: BF2 = 1 - pixel alpha * constant alpha
value: 7
enum/CFUIF:
bit_size: 1
variants:
- name: Clear
description: Clears the FUIF flag in the ISR register
value: 1
enum/CLIF:
bit_size: 1
variants:
- name: Clear
description: Clears the LIF flag in the ISR register
value: 1
enum/CLUTEN:
bit_size: 1
variants:
- name: Disabled
description: Color look-up table disabled
value: 0
- name: Enabled
description: Color look-up table enabled
value: 1
enum/COLKEN:
bit_size: 1
variants:
- name: Disabled
description: Color keying disabled
value: 0
- name: Enabled
description: Color keying enabled
value: 1
enum/CRRIF:
bit_size: 1
variants:
- name: Clear
description: Clears the RRIF flag in the ISR register
value: 1
enum/CTERRIF:
bit_size: 1
variants:
- name: Clear
description: Clears the TERRIF flag in the ISR register
value: 1
enum/DEN:
bit_size: 1
variants:
- name: Disabled
description: Dither disabled
value: 0
- name: Enabled
description: Dither enabled
value: 1
enum/DEPOL:
bit_size: 1
variants:
- name: ActiveLow
description: Data enable polarity is active low
value: 0
- name: ActiveHigh
description: Data enable polarity is active high
value: 1
enum/FUIE:
bit_size: 1
variants:
- name: Disabled
description: FIFO underrun interrupt disabled
value: 0
- name: Enabled
description: FIFO underrun interrupt enabled
value: 1
enum/FUIF:
bit_size: 1
variants:
- name: NoUnderrun
description: No FIFO underrun
value: 0
- name: Underrun
description: FIFO underrun interrupt generated, if one of the layer FIFOs is empty and pixel data is read from the FIFO
value: 1
enum/HDES:
bit_size: 1
variants:
- name: NotActive
description: Currently not in horizontal Data Enable phase
value: 0
- name: Active
description: Currently in horizontal Data Enable phase
value: 1
enum/HSPOL:
bit_size: 1
variants:
- name: ActiveLow
description: Horizontal synchronization polarity is active low
value: 0
- name: ActiveHigh
description: Horizontal synchronization polarity is active high
value: 1
enum/HSYNCS:
bit_size: 1
variants:
- name: NotActive
description: Currently not in HSYNC phase
value: 0
- name: Active
description: Currently in HSYNC phase
value: 1
enum/IMR:
bit_size: 1
variants:
- name: NoEffect
description: This bit is set by software and cleared only by hardware after reload (it cannot be cleared through register write once it is set)
value: 0
- name: Reload
description: The shadow registers are reloaded immediately. This bit is set by software and cleared only by hardware after reload
value: 1
enum/LEN:
bit_size: 1
variants:
- name: Disabled
description: Layer disabled
value: 0
- name: Enabled
description: Layer enabled
value: 1
enum/LIE:
bit_size: 1
variants:
- name: Disabled
description: Line interrupt disabled
value: 0
- name: Enabled
description: Line interrupt enabled
value: 1
enum/LIF:
bit_size: 1
variants:
- name: NotReached
description: Programmed line not reached
value: 0
- name: Reached
description: Line interrupt generated when a programmed line is reached
value: 1
enum/LTDCEN:
bit_size: 1
variants:
- name: Disabled
description: LCD-TFT controller disabled
value: 0
- name: Enabled
description: LCD-TFT controller enabled
value: 1
enum/PCPOL:
bit_size: 1
variants:
- name: RisingEdge
description: Pixel clock on rising edge
value: 0
- name: FallingEdge
description: Pixel clock on falling edge
value: 1
enum/PF:
bit_size: 3
variants:
- name: ARGB8888
description: ARGB8888
value: 0
- name: RGB888
description: RGB888
value: 1
- name: RGB565
description: RGB565
value: 2
- name: ARGB1555
description: ARGB1555
value: 3
- name: ARGB4444
description: ARGB4444
value: 4
- name: L8
description: L8 (8-bit luminance)
value: 5
- name: AL44
description: AL44 (4-bit alpha, 4-bit luminance)
value: 6
- name: AL88
description: AL88 (8-bit alpha, 8-bit luminance)
value: 7
enum/RRIE:
bit_size: 1
variants:
- name: Disabled
description: Register reload interrupt disabled
value: 0
- name: Enabled
description: Register reload interrupt enabled
value: 1
enum/RRIF:
bit_size: 1
variants:
- name: NoReload
description: No register reload
value: 0
- name: Reload
description: Register reload interrupt generated when a vertical blanking reload occurs (and the first line after the active area is reached)
value: 1
enum/TERRIE:
bit_size: 1
variants:
- name: Disabled
description: Transfer error interrupt disabled
value: 0
- name: Enabled
description: Transfer error interrupt enabled
value: 1
enum/TERRIF:
bit_size: 1
variants:
- name: NoError
description: No transfer error
value: 0
- name: Error
description: Transfer error interrupt generated when a bus error occurs
value: 1
enum/VBR:
bit_size: 1
variants:
- name: NoEffect
description: This bit is set by software and cleared only by hardware after reload (it cannot be cleared through register write once it is set)
value: 0
- name: Reload
description: The shadow registers are reloaded during the vertical blanking period (at the beginning of the first line after the active display area).
value: 1
enum/VDES:
bit_size: 1
variants:
- name: NotActive
description: Currently not in vertical Data Enable phase
value: 0
- name: Active
description: Currently in vertical Data Enable phase
value: 1
enum/VSPOL:
bit_size: 1
variants:
- name: ActiveLow
description: Vertical synchronization polarity is active low
value: 0
- name: ActiveHigh
description: Vertical synchronization polarity is active high
value: 1
enum/VSYNCS:
bit_size: 1
variants:
- name: NotActive
description: Currently not in VSYNC phase
value: 0
- name: Active
description: Currently in VSYNC phase
value: 1
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