141 lines
3.5 KiB
YAML
141 lines
3.5 KiB
YAML
block/DBGMCU:
|
|
description: Debug support
|
|
items:
|
|
- name: IDCODE
|
|
description: MCU Device ID Code Register
|
|
byte_offset: 0
|
|
access: Read
|
|
fieldset: IDCODE
|
|
- name: CR
|
|
description: Debug MCU Configuration Register
|
|
byte_offset: 4
|
|
fieldset: CR
|
|
- name: APB1FZR
|
|
description: APB Low Freeze Register
|
|
byte_offset: 8
|
|
fieldset: APB1FZR
|
|
- name: APB2FZR
|
|
description: APB High Freeze Register
|
|
byte_offset: 12
|
|
fieldset: APB2FZR
|
|
fieldset/APB1FZR:
|
|
description: APB Low Freeze Register
|
|
fields:
|
|
- name: TIM2
|
|
description: Debug Timer 2 stopped when Core is halted
|
|
bit_offset: 0
|
|
bit_size: 1
|
|
- name: TIM3
|
|
description: Debug Timer 3 stopped when Core is halted
|
|
bit_offset: 1
|
|
bit_size: 1
|
|
- name: TIM4
|
|
description: Debug Timer 4 stopped when Core is halted
|
|
bit_offset: 2
|
|
bit_size: 1
|
|
- name: TIM5
|
|
description: Debug Timer 5 stopped when Core is halted
|
|
bit_offset: 3
|
|
bit_size: 1
|
|
- name: TIM6
|
|
description: Debug Timer 6 stopped when Core is halted
|
|
bit_offset: 4
|
|
bit_size: 1
|
|
- name: TIM7
|
|
description: Debug Timer 7 stopped when Core is halted
|
|
bit_offset: 5
|
|
bit_size: 1
|
|
- name: TIM12
|
|
description: Debug Timer 12 stopped when Core is halted
|
|
bit_offset: 6
|
|
bit_size: 1
|
|
- name: TIM13
|
|
description: Debug Timer 13 stopped when Core is halted
|
|
bit_offset: 7
|
|
bit_size: 1
|
|
- name: TIM14
|
|
description: Debug Timer 14 stopped when Core is halted
|
|
bit_offset: 8
|
|
bit_size: 1
|
|
- name: TIM18
|
|
description: Debug Timer 18 stopped when Core is halted
|
|
bit_offset: 9
|
|
bit_size: 1
|
|
- name: RTC
|
|
description: Debug RTC stopped when Core is halted
|
|
bit_offset: 10
|
|
bit_size: 1
|
|
- name: WWDG
|
|
description: Debug Window Wachdog stopped when Core is halted
|
|
bit_offset: 11
|
|
bit_size: 1
|
|
- name: IWDG
|
|
description: Debug Independent Wachdog stopped when Core is halted
|
|
bit_offset: 12
|
|
bit_size: 1
|
|
- name: I2C1_SMBUS_TIMEOUT
|
|
description: SMBUS timeout mode stopped when Core is halted
|
|
bit_offset: 21
|
|
bit_size: 1
|
|
- name: I2C2_SMBUS_TIMEOUT
|
|
description: SMBUS timeout mode stopped when Core is halted
|
|
bit_offset: 22
|
|
bit_size: 1
|
|
- name: CAN
|
|
description: Debug CAN stopped when core is halted
|
|
bit_offset: 25
|
|
bit_size: 1
|
|
fieldset/APB2FZR:
|
|
description: APB High Freeze Register
|
|
fields:
|
|
- name: TIM15
|
|
description: Debug Timer 15 stopped when Core is halted
|
|
bit_offset: 2
|
|
bit_size: 1
|
|
- name: TIM16
|
|
description: Debug Timer 16 stopped when Core is halted
|
|
bit_offset: 3
|
|
bit_size: 1
|
|
- name: TIM17
|
|
description: Debug Timer 17 stopped when Core is halted
|
|
bit_offset: 4
|
|
bit_size: 1
|
|
- name: TIM19
|
|
description: Debug Timer 19 stopped when Core is halted
|
|
bit_offset: 5
|
|
bit_size: 1
|
|
fieldset/CR:
|
|
description: Debug MCU Configuration Register
|
|
fields:
|
|
- name: DBG_SLEEP
|
|
description: Debug Sleep mode
|
|
bit_offset: 0
|
|
bit_size: 1
|
|
- name: DBG_STOP
|
|
description: Debug Stop Mode
|
|
bit_offset: 1
|
|
bit_size: 1
|
|
- name: DBG_STANDBY
|
|
description: Debug Standby Mode
|
|
bit_offset: 2
|
|
bit_size: 1
|
|
- name: TRACE_IOEN
|
|
description: Trace pin assignment control
|
|
bit_offset: 5
|
|
bit_size: 1
|
|
- name: TRACE_MODE
|
|
description: Trace pin assignment control
|
|
bit_offset: 6
|
|
bit_size: 2
|
|
fieldset/IDCODE:
|
|
description: MCU Device ID Code Register
|
|
fields:
|
|
- name: DEV_ID
|
|
description: Device Identifier
|
|
bit_offset: 0
|
|
bit_size: 12
|
|
- name: REV_ID
|
|
description: Revision Identifier
|
|
bit_offset: 16
|
|
bit_size: 16
|