149 lines
3.0 KiB
YAML
149 lines
3.0 KiB
YAML
block/DBGMCU:
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description: Debug support
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items:
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- name: IDCODE
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description: IDCODE
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byte_offset: 0
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access: Read
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fieldset: IDCODE
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- name: CR
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description: Control Register
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byte_offset: 4
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fieldset: CR
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- name: APB1_FZ
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description: Debug MCU APB1 Freeze registe
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byte_offset: 8
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fieldset: APB1_FZ
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- name: APB2_FZ
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description: Debug MCU APB2 Freeze registe
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byte_offset: 12
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fieldset: APB2_FZ
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fieldset/APB1_FZ:
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description: Debug MCU APB1 Freeze registe
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fields:
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- name: TIM2
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description: TIM2
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bit_offset: 0
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bit_size: 1
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- name: TIM3
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description: TIM3
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bit_offset: 1
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bit_size: 1
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- name: TIM4
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description: TIM4
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bit_offset: 2
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bit_size: 1
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- name: TIM5
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description: TIM5
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bit_offset: 3
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bit_size: 1
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- name: TIM6
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description: TIM6
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bit_offset: 4
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bit_size: 1
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- name: TIM7
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description: TIM7
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bit_offset: 5
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bit_size: 1
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- name: TIM12
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description: TIM12
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bit_offset: 6
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bit_size: 1
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- name: TIM13
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description: TIM13
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bit_offset: 7
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bit_size: 1
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- name: TIM14
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description: TIM14
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bit_offset: 8
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bit_size: 1
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- name: RTC
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description: RTC
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bit_offset: 10
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bit_size: 1
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- name: WWDG
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description: WWDG
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bit_offset: 11
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bit_size: 1
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- name: IWDG
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description: IWDEG
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bit_offset: 12
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bit_size: 1
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- name: I2C1_SMBUS_TIMEOUT
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description: I2C1_SMBUS_TIMEOUT
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bit_offset: 21
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bit_size: 1
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- name: I2C2_SMBUS_TIMEOUT
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description: I2C2_SMBUS_TIMEOUT
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bit_offset: 22
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bit_size: 1
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- name: I2C3_SMBUS_TIMEOUT
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description: I2C3_SMBUS_TIMEOUT
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bit_offset: 23
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bit_size: 1
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- name: CAN1
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description: CAN1
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bit_offset: 25
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bit_size: 1
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- name: CAN2
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description: CAN2
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bit_offset: 26
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bit_size: 1
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fieldset/APB2_FZ:
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description: Debug MCU APB2 Freeze registe
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fields:
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- name: TIM1
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description: TIM1 counter stopped when core is halted
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bit_offset: 0
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bit_size: 1
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- name: TIM8
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description: TIM8 counter stopped when core is halted
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bit_offset: 1
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bit_size: 1
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- name: TIM9
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description: TIM9 counter stopped when core is halted
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bit_offset: 16
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bit_size: 1
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- name: TIM10
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description: TIM10 counter stopped when core is halted
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bit_offset: 17
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bit_size: 1
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- name: TIM11
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description: TIM11 counter stopped when core is halted
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bit_offset: 18
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bit_size: 1
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fieldset/CR:
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description: Control Register
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fields:
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- name: DBG_SLEEP
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description: DBG_SLEEP
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bit_offset: 0
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bit_size: 1
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- name: DBG_STOP
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description: DBG_STOP
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bit_offset: 1
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bit_size: 1
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- name: DBG_STANDBY
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description: DBG_STANDBY
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bit_offset: 2
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bit_size: 1
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- name: TRACE_IOEN
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description: TRACE_IOEN
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bit_offset: 5
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bit_size: 1
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- name: TRACE_MODE
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description: TRACE_MODE
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bit_offset: 6
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bit_size: 2
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fieldset/IDCODE:
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description: IDCODE
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fields:
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- name: DEV_ID
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description: DEV_ID
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bit_offset: 0
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bit_size: 12
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- name: REV_ID
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description: REV_ID
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bit_offset: 16
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bit_size: 16
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