423 lines
9.9 KiB
YAML
423 lines
9.9 KiB
YAML
block/TIM:
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description: Advanced-timers
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1
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- name: DIER
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description: DMA/Interrupt enable register
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byte_offset: 12
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fieldset: DIER
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- name: SR
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description: status register
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byte_offset: 16
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fieldset: SR
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- name: EGR
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description: event generation register
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byte_offset: 20
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access: Write
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fieldset: EGR
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- name: CCMR_Input
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description: capture/compare mode register 1 (input mode)
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array:
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len: 1
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Input
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- name: CCMR_Output
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description: capture/compare mode register 1 (output mode)
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array:
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len: 1
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stride: 4
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byte_offset: 24
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fieldset: CCMR_Output
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- name: CCER
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description: capture/compare enable register
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byte_offset: 32
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fieldset: CCER
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- name: CNT
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description: counter
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byte_offset: 36
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fieldset: CNT
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- name: PSC
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description: prescaler
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byte_offset: 40
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fieldset: PSC
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- name: ARR
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description: auto-reload register (Dither mode disabled)
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byte_offset: 44
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fieldset: ARR
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- name: ARR_DITHER
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description: auto-reload register (Dither mode enabled)
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byte_offset: 44
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fieldset: ARR_DITHER
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- name: CCR
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description: capture/compare register x (x=1) (Dither mode disabled)
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array:
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len: 1
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stride: 4
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byte_offset: 52
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fieldset: CCR
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- name: CCR_DITHER
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description: capture/compare register x (x=1) (Dither mode enabled)
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array:
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len: 1
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stride: 4
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byte_offset: 52
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fieldset: CCR_DITHER
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- name: TISEL
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description: input selection register
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byte_offset: 92
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fieldset: TISEL
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fieldset/ARR:
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description: auto-reload register (Dither mode disabled)
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fields:
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- name: ARR
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description: Auto-reload value
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bit_offset: 0
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bit_size: 16
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fieldset/ARR_DITHER:
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description: auto-reload register (Dither mode enabled)
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fields:
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- name: DITHER
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description: Dither value
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bit_offset: 0
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bit_size: 4
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- name: ARR
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description: Auto-reload value
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bit_offset: 4
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bit_size: 16
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fieldset/CCER:
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description: capture/compare enable register
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fields:
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- name: CCE
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description: Capture/Compare x (x=1) output enable
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bit_offset: 0
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bit_size: 1
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array:
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len: 1
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stride: 4
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- name: CCP
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description: Capture/Compare x (x=1) output Polarity
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 4
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- name: CCNP
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description: Capture/Compare x (x=1) output Polarity
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bit_offset: 3
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bit_size: 1
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array:
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len: 1
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stride: 4
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fieldset/CCMR_Input:
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description: capture/compare mode register x (x=1) (input mode)
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fields:
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- name: CCS
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description: Capture/Compare y selection
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bit_offset: 0
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bit_size: 2
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array:
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len: 1
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stride: 8
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enum: CCMR_Input_CCS
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- name: ICPSC
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description: Input capture y prescaler
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bit_offset: 2
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bit_size: 2
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array:
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len: 1
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stride: 8
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- name: ICF
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description: Input capture y filter
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bit_offset: 4
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bit_size: 4
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array:
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len: 1
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stride: 8
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enum: FilterValue
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fieldset/CCMR_Output:
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description: capture/compare mode register x (x=1) (output mode)
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fields:
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- name: CCS
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description: Capture/Compare y selection
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bit_offset: 0
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bit_size: 2
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array:
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len: 1
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stride: 8
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enum: CCMR_Output_CCS
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- name: OCFE
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description: Output compare y fast enable
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bit_offset: 2
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bit_size: 1
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array:
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len: 1
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stride: 8
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- name: OCPE
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description: Output compare y preload enable
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bit_offset: 3
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bit_size: 1
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array:
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len: 1
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stride: 8
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- name: OCM
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description: Output compare y mode
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bit_offset: 4
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bit_size: 3
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array:
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len: 1
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stride: 8
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enum: OCM
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fieldset/CCR:
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description: capture/compare register x (x=1) (Dither mode disabled)
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fields:
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- name: CCR
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description: capture/compare x (x=1) value
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bit_offset: 0
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bit_size: 16
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fieldset/CCR_DITHER:
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description: capture/compare register x (x=1) (Dither mode enabled)
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fields:
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- name: DITHER
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description: Dither value
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bit_offset: 0
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bit_size: 4
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- name: CCR
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description: capture/compare x (x=1) value
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bit_offset: 4
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bit_size: 16
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fieldset/CNT:
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description: counter
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fields:
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- name: CNT
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description: counter value
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bit_offset: 0
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bit_size: 16
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- name: UIFCPY
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description: UIF copy
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bit_offset: 31
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bit_size: 1
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fieldset/CR1:
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description: control register 1
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fields:
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- name: CEN
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description: Counter enable
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bit_offset: 0
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bit_size: 1
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- name: UDIS
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description: Update disable
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bit_offset: 1
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bit_size: 1
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- name: URS
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description: Update request source
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bit_offset: 2
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bit_size: 1
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enum: URS
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- name: OPM
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description: One-pulse mode enbaled
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bit_offset: 3
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bit_size: 1
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- name: ARPE
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description: Auto-reload preload enable
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bit_offset: 7
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bit_size: 1
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- name: CKD
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description: Clock division
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bit_offset: 8
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bit_size: 2
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enum: CKD
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- name: UIFREMAP
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description: UIF status bit remapping enable
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bit_offset: 11
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bit_size: 1
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- name: DITHEN
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description: Dithering enable
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bit_offset: 12
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bit_size: 1
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fieldset/DIER:
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description: DMA/Interrupt enable register
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fields:
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- name: UIE
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description: Update interrupt enable
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bit_offset: 0
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bit_size: 1
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- name: CCIE
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description: Capture/Compare x (x=1) interrupt enable
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 1
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fieldset/EGR:
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description: event generation register
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fields:
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- name: UG
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description: Update generation
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bit_offset: 0
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bit_size: 1
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- name: CCG
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description: Capture/compare x (x=1) generation
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 1
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fieldset/PSC:
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description: prescaler
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fields:
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- name: PSC
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description: Prescaler value
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bit_offset: 0
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bit_size: 16
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fieldset/SR:
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description: status register
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fields:
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- name: UIF
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description: Update interrupt flag
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bit_offset: 0
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bit_size: 1
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- name: CCIF
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description: Capture/compare x (x=1) interrupt flag
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bit_offset: 1
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bit_size: 1
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array:
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len: 1
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stride: 1
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- name: CCOF
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description: Capture/Compare x (x=1) overcapture flag
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bit_offset: 9
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bit_size: 1
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array:
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len: 1
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stride: 1
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fieldset/TISEL:
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description: input selection register
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fields:
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- name: TISEL
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description: Selects TIM_TIx (x=1) input
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bit_offset: 0
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bit_size: 4
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array:
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len: 1
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stride: 8
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enum/CCMR_Input_CCS:
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bit_size: 2
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variants:
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- name: TI4
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description: 'CCx channel is configured as input, normal mapping: ICx mapped to TIx'
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value: 1
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- name: TI3
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description: CCx channel is configured as input, alternate mapping (switches 1 with 2, 3 with 4)
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value: 2
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- name: TRC
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description: CCx channel is configured as input, ICx is mapped on TRC
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value: 3
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enum/CCMR_Output_CCS:
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bit_size: 2
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variants:
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- name: Output
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description: CCx channel is configured as output
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value: 0
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enum/CKD:
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bit_size: 2
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variants:
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- name: Div1
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description: t_DTS = t_CK_INT
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value: 0
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- name: Div2
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description: t_DTS = 2 × t_CK_INT
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value: 1
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- name: Div4
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description: t_DTS = 4 × t_CK_INT
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value: 2
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enum/FilterValue:
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bit_size: 4
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variants:
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- name: NoFilter
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description: No filter, sampling is done at fDTS
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value: 0
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- name: FCK_INT_N2
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description: fSAMPLING=fCK_INT, N=2
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value: 1
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- name: FCK_INT_N4
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description: fSAMPLING=fCK_INT, N=4
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value: 2
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- name: FCK_INT_N8
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description: fSAMPLING=fCK_INT, N=8
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value: 3
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- name: FDTS_Div2_N6
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description: fSAMPLING=fDTS/2, N=6
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value: 4
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- name: FDTS_Div2_N8
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description: fSAMPLING=fDTS/2, N=8
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value: 5
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- name: FDTS_Div4_N6
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description: fSAMPLING=fDTS/4, N=6
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value: 6
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- name: FDTS_Div4_N8
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description: fSAMPLING=fDTS/4, N=8
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value: 7
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- name: FDTS_Div8_N6
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description: fSAMPLING=fDTS/8, N=6
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value: 8
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- name: FDTS_Div8_N8
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description: fSAMPLING=fDTS/8, N=8
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value: 9
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- name: FDTS_Div16_N5
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description: fSAMPLING=fDTS/16, N=5
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value: 10
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- name: FDTS_Div16_N6
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description: fSAMPLING=fDTS/16, N=6
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value: 11
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- name: FDTS_Div16_N8
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description: fSAMPLING=fDTS/16, N=8
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value: 12
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- name: FDTS_Div32_N5
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description: fSAMPLING=fDTS/32, N=5
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value: 13
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- name: FDTS_Div32_N6
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description: fSAMPLING=fDTS/32, N=6
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value: 14
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- name: FDTS_Div32_N8
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description: fSAMPLING=fDTS/32, N=8
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value: 15
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enum/OCM:
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bit_size: 3
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variants:
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- name: Frozen
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description: The comparison between the output compare register TIMx_CCRy and the counter TIMx_CNT has no effect on the outputs
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value: 0
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- name: ActiveOnMatch
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description: Set channel to active level on match. OCyREF signal is forced high when the counter matches the capture/compare register
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value: 1
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- name: InactiveOnMatch
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description: Set channel to inactive level on match. OCyREF signal is forced low when the counter matches the capture/compare register
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value: 2
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- name: Toggle
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description: OCyREF toggles when TIMx_CNT=TIMx_CCRy
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value: 3
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- name: ForceInactive
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description: OCyREF is forced low
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value: 4
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- name: ForceActive
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description: OCyREF is forced high
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value: 5
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- name: PwmMode1
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description: In upcounting, channel is active as long as TIMx_CNT<TIMx_CCRy else inactive. In downcounting, channel is inactive as long as TIMx_CNT>TIMx_CCRy else active
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value: 6
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- name: PwmMode2
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description: Inversely to PwmMode1
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value: 7
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enum/URS:
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bit_size: 1
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variants:
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- name: AnyEvent
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description: Any of counter overflow/underflow, setting UG, or update through slave mode, generates an update interrupt or DMA request
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value: 0
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- name: CounterOnly
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description: Only counter overflow/underflow generates an update interrupt or DMA request
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value: 1
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