189 lines
4.1 KiB
YAML
189 lines
4.1 KiB
YAML
# DAC v1, only used in RM0008 STM32F101/102/103/105/107.
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block/DAC:
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description: Digital-to-analog converter
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items:
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- name: CR
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description: control register
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byte_offset: 0
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fieldset: CR
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- name: SWTRIGR
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description: software trigger register
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byte_offset: 4
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access: Write
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fieldset: SWTRIGR
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- name: DHR12R
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description: channel 12-bit right-aligned data holding register
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array:
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len: 2
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stride: 12
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byte_offset: 8
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fieldset: DHR12R
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- name: DHR12L
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description: channel 12-bit left-aligned data holding register
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array:
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len: 2
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stride: 12
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byte_offset: 12
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fieldset: DHR12L
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- name: DHR8R
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description: channel 8-bit right-aligned data holding register
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array:
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len: 2
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stride: 12
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byte_offset: 16
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fieldset: DHR8R
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- name: DHR12RD
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description: dual 12-bit right-aligned data holding register
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byte_offset: 32
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fieldset: DHR12RD
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- name: DHR12LD
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description: dual 12-bit left aligned data holding register
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byte_offset: 36
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fieldset: DHR12LD
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- name: DHR8RD
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description: dual 8-bit right aligned data holding register
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byte_offset: 40
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fieldset: DHR8RD
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- name: DOR
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description: channel data output register
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array:
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len: 2
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stride: 4
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byte_offset: 44
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access: Read
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fieldset: DOR
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fieldset/CR:
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description: control register
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fields:
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- name: EN
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description: channel enable
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bit_offset: 0
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bit_size: 1
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array:
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len: 2
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stride: 16
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- name: BOFF
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description: channel output buffer disable
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bit_offset: 1
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bit_size: 1
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array:
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len: 2
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stride: 16
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- name: TEN
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description: channel trigger enable
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bit_offset: 2
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bit_size: 1
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array:
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len: 2
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stride: 16
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- name: TSEL
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description: channel trigger selection
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bit_offset: 3
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bit_size: 3
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array:
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len: 2
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stride: 16
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- name: WAVE
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description: channel noise/triangle wave generation enable
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bit_offset: 6
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bit_size: 2
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array:
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len: 2
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stride: 16
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enum: WAVE
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- name: MAMP
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description: channel mask/amplitude selector
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bit_offset: 8
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bit_size: 4
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array:
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len: 2
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stride: 16
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- name: DMAEN
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description: channel DMA enable
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bit_offset: 12
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bit_size: 1
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array:
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len: 2
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stride: 16
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fieldset/DHR12L:
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description: channel 12-bit left-aligned data holding register
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fields:
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- name: DHR
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description: channel 12-bit left-aligned data
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bit_offset: 4
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bit_size: 12
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fieldset/DHR12LD:
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description: dual 12-bit left aligned data holding register
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fields:
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- name: DHR
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description: channel 12-bit left-aligned data
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bit_offset: 4
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bit_size: 12
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array:
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len: 2
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stride: 16
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fieldset/DHR12R:
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description: channel 12-bit right-aligned data holding register
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fields:
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- name: DHR
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description: channel 12-bit right-aligned data
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bit_offset: 0
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bit_size: 12
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fieldset/DHR12RD:
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description: dual 12-bit right-aligned data holding register
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fields:
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- name: DHR
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description: channel 12-bit right-aligned data
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bit_offset: 0
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bit_size: 12
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array:
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len: 2
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stride: 16
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fieldset/DHR8R:
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description: channel 8-bit right-aligned data holding register
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fields:
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- name: DHR
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description: channel 8-bit right-aligned data
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bit_offset: 0
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bit_size: 8
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fieldset/DHR8RD:
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description: dual 8-bit right aligned data holding register
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fields:
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- name: DHR
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description: channel 8-bit right-aligned data
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bit_offset: 0
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bit_size: 8
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array:
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len: 2
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stride: 8
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fieldset/DOR:
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description: channel data output register
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fields:
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- name: DOR
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description: channel data output
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bit_offset: 0
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bit_size: 12
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fieldset/SWTRIGR:
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description: software trigger register
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fields:
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- name: SWTRIG
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description: channel software trigger
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bit_offset: 0
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bit_size: 1
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array:
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len: 2
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stride: 1
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enum/WAVE:
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bit_size: 2
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variants:
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- name: Disabled
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description: Wave generation disabled
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value: 0
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- name: Noise
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description: Noise wave generation enabled
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value: 1
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- name: Triangle
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description: Triangle wave generation enabled
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value: 2
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