72 lines
1.5 KiB
YAML
72 lines
1.5 KiB
YAML
block/PWR:
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description: Power control
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items:
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- name: CR
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description: Power control register (PWR_CR)
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byte_offset: 0
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fieldset: CR
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- name: CSR
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description: Power control register (PWR_CR)
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byte_offset: 4
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fieldset: CSR
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fieldset/CR:
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description: Power control register (PWR_CR)
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fields:
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- name: LPDS
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description: Low Power Deep Sleep
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bit_offset: 0
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bit_size: 1
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- name: PDDS
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description: Power Down Deep Sleep
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bit_offset: 1
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bit_size: 1
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enum: PDDS
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- name: CWUF
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description: Clear Wake-up Flag
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bit_offset: 2
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bit_size: 1
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- name: CSBF
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description: Clear STANDBY Flag
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bit_offset: 3
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bit_size: 1
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- name: PVDE
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description: Power Voltage Detector Enable
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bit_offset: 4
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bit_size: 1
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- name: PLS
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description: PVD Level Selection
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bit_offset: 5
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bit_size: 3
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- name: DBP
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description: Disable Backup Domain write protection
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bit_offset: 8
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bit_size: 1
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fieldset/CSR:
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description: Power control register (PWR_CR)
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fields:
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- name: WUF
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description: Wake-Up Flag
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bit_offset: 0
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bit_size: 1
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- name: SBF
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description: STANDBY Flag
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bit_offset: 1
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bit_size: 1
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- name: PVDO
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description: PVD Output
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bit_offset: 2
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bit_size: 1
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- name: EWUP
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description: Enable WKUP pin
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bit_offset: 8
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bit_size: 1
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enum/PDDS:
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bit_size: 1
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variants:
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- name: STOP_MODE
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description: Enter Stop mode when the CPU enters deepsleep
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value: 0
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- name: STANDBY_MODE
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description: Enter Standby mode when the CPU enters deepsleep
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value: 1
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