756 lines
16 KiB
YAML
756 lines
16 KiB
YAML
---
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block/CH:
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description: Cluster CH%s, containing ?CR1, ?CR2, ?FRCR, ?SLOTR, ?IM, ?SR, ?CLRFR,
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?DR
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items:
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- byte_offset: 0
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description: AConfiguration register 1
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fieldset: CR1
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name: CR1
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- byte_offset: 4
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description: AConfiguration register 2
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fieldset: CR2
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name: CR2
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- byte_offset: 8
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description: AFRCR
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fieldset: FRCR
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name: FRCR
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- byte_offset: 12
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description: ASlot register
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fieldset: SLOTR
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name: SLOTR
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- byte_offset: 16
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description: AInterrupt mask register2
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fieldset: IM
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name: IM
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- access: Read
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byte_offset: 20
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description: AStatus register
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fieldset: SR
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name: SR
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- access: Write
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byte_offset: 24
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description: AClear flag register
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fieldset: CLRFR
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name: CLRFR
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- byte_offset: 28
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description: AData register
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fieldset: DR
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name: DR
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block/SAI:
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description: Serial audio interface
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items:
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- byte_offset: 0
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description: Global configuration register
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fieldset: GCR
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name: GCR
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- array:
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len: 2
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stride: 32
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block: CH
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byte_offset: 4
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description: Cluster CH%s, containing ?CR1, ?CR2, ?FRCR, ?SLOTR, ?IM, ?SR, ?CLRFR,
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?DR
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name: CH
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enum/AFSDETIE:
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bit_size: 1
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variants:
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- description: Interrupt is disabled
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name: Disabled
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value: 0
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- description: Interrupt is enabled
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name: Enabled
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value: 1
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enum/AFSDETR:
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bit_size: 1
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variants:
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- description: No error
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name: NoError
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value: 0
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- description: Frame synchronization signal is detected earlier than expected
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name: EarlySync
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value: 1
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enum/CAFSDETW:
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bit_size: 1
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variants:
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- description: Clears the AFSDET flag
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name: Clear
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value: 1
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enum/CCNRDYW:
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bit_size: 1
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variants:
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- description: Clears the CNRDY flag
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name: Clear
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value: 1
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enum/CKSTR:
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bit_size: 1
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variants:
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- description: Data strobing edge is falling edge of SCK
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name: FallingEdge
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value: 0
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- description: Data strobing edge is rising edge of SCK
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name: RisingEdge
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value: 1
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enum/CLFSDETW:
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bit_size: 1
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variants:
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- description: Clears the LFSDET flag
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name: Clear
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value: 1
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enum/CMUTEDETW:
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bit_size: 1
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variants:
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- description: Clears the MUTEDET flag
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name: Clear
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value: 1
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enum/CNRDYIE:
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bit_size: 1
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variants:
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- description: Interrupt is disabled
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name: Disabled
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value: 0
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- description: Interrupt is enabled
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name: Enabled
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value: 1
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enum/CNRDYR:
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bit_size: 1
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variants:
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- description: "External AC\u201997 Codec is ready"
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name: Ready
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value: 0
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- description: "External AC\u201997 Codec is not ready"
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name: NotReady
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value: 1
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enum/COMP:
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bit_size: 2
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variants:
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- description: No companding algorithm
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name: NoCompanding
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value: 0
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- description: "\u03BC-Law algorithm"
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name: MuLaw
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value: 2
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- description: A-Law algorithm
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name: ALaw
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value: 3
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enum/COVRUDRW:
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bit_size: 1
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variants:
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- description: Clears the OVRUDR flag
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name: Clear
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value: 1
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enum/CPL:
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bit_size: 1
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variants:
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- description: "1\u2019s complement representation"
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name: OnesComplement
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value: 0
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- description: "2\u2019s complement representation"
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name: TwosComplement
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value: 1
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enum/CWCKCFGW:
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bit_size: 1
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variants:
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- description: Clears the WCKCFG flag
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name: Clear
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value: 1
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enum/DMAEN:
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bit_size: 1
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variants:
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- description: DMA disabled
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name: Disabled
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value: 0
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- description: DMA enabled
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name: Enabled
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value: 1
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enum/DS:
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bit_size: 3
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variants:
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- description: 8 bits
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name: Bit8
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value: 2
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- description: 10 bits
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name: Bit10
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value: 3
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- description: 16 bits
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name: Bit16
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value: 4
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- description: 20 bits
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name: Bit20
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value: 5
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- description: 24 bits
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name: Bit24
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value: 6
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- description: 32 bits
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name: Bit32
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value: 7
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enum/FFLUSH:
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bit_size: 1
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variants:
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- description: No FIFO flush
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name: NoFlush
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value: 0
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- description: FIFO flush. Programming this bit to 1 triggers the FIFO Flush. All
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the internal FIFO pointers (read and write) are cleared
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name: Flush
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value: 1
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enum/FLVLR:
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bit_size: 3
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variants:
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- description: FIFO empty
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name: Empty
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value: 0
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- description: "FIFO <= 1\u20444 but not empty"
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name: Quarter1
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value: 1
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- description: "1\u20444 < FIFO <= 1\u20442"
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name: Quarter2
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value: 2
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- description: "1\u20442 < FIFO <= 3\u20444"
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name: Quarter3
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value: 3
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- description: "3\u20444 < FIFO but not full"
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name: Quarter4
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value: 4
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- description: FIFO full
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name: Full
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value: 5
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enum/FREQIE:
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bit_size: 1
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variants:
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- description: Interrupt is disabled
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name: Disabled
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value: 0
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- description: Interrupt is enabled
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name: Enabled
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value: 1
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enum/FREQR:
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bit_size: 1
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variants:
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- description: No FIFO request
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name: NoRequest
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value: 0
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- description: FIFO request to read or to write the SAI_xDR
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name: Request
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value: 1
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enum/FSOFF:
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bit_size: 1
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variants:
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- description: FS is asserted on the first bit of the slot 0
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name: OnFirst
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value: 0
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- description: FS is asserted one bit before the first bit of the slot 0
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name: BeforeFirst
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value: 1
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enum/FSPOL:
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bit_size: 1
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variants:
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- description: FS is active low (falling edge)
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name: FallingEdge
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value: 0
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- description: FS is active high (rising edge)
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name: RisingEdge
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value: 1
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enum/FTH:
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bit_size: 3
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variants:
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- description: FIFO empty
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name: Empty
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value: 0
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- description: "1\u20444 FIFO"
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name: Quarter1
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value: 1
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- description: "1\u20442 FIFO"
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name: Quarter2
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value: 2
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- description: "3\u20444 FIFO"
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name: Quarter3
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value: 3
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- description: FIFO full
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name: Full
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value: 4
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enum/LFSDETIE:
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bit_size: 1
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variants:
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- description: Interrupt is disabled
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name: Disabled
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value: 0
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- description: Interrupt is enabled
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name: Enabled
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value: 1
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enum/LFSDETR:
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bit_size: 1
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variants:
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- description: No error
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name: NoError
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value: 0
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- description: Frame synchronization signal is not present at the right time
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name: NoSync
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value: 1
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enum/LSBFIRST:
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bit_size: 1
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variants:
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- description: Data are transferred with MSB first
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name: MsbFirst
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value: 0
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- description: Data are transferred with LSB first
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name: LsbFirst
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value: 1
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enum/MODE:
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bit_size: 2
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variants:
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- description: Master transmitter
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name: MasterTx
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value: 0
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- description: Master receiver
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name: MasterRx
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value: 1
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- description: Slave transmitter
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name: SlaveTx
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value: 2
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- description: Slave receiver
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name: SlaveRx
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value: 3
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enum/MONO:
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bit_size: 1
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variants:
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- description: Stereo mode
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name: Stereo
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value: 0
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- description: Mono mode
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name: Mono
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value: 1
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enum/MUTE:
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bit_size: 1
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variants:
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- description: No mute mode
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name: Disabled
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value: 0
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- description: Mute mode enabled
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name: Enabled
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value: 1
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enum/MUTEDETIE:
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bit_size: 1
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variants:
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- description: Interrupt is disabled
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name: Disabled
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value: 0
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- description: Interrupt is enabled
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name: Enabled
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value: 1
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enum/MUTEDETR:
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bit_size: 1
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variants:
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- description: No MUTE detection on the SD input line
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name: NoMute
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value: 0
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- description: MUTE value detected on the SD input line (0 value) for a specified
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number of consecutive audio frame
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name: Mute
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value: 1
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enum/MUTEVAL:
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bit_size: 1
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variants:
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- description: Bit value 0 is sent during the mute mode
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name: SendZero
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value: 0
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- description: Last values are sent during the mute mode
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name: SendLast
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value: 1
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enum/NODIV:
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bit_size: 1
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variants:
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- description: MCLK output is enabled. Forces the ratio between FS and MCLK to 256
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or 512 according to the OSR value
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name: MasterClock
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value: 0
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- description: MCLK output enable set by the MCKEN bit (where present, else 0).
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Ratio between FS and MCLK depends on FRL.
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name: NoDiv
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value: 1
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enum/OUTDRIV:
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bit_size: 1
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variants:
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- description: Audio block output driven when SAIEN is set
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name: OnStart
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value: 0
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- description: Audio block output driven immediately after the setting of this bit
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name: Immediately
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value: 1
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enum/OVRUDRIE:
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bit_size: 1
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variants:
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- description: Interrupt is disabled
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name: Disabled
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value: 0
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- description: Interrupt is enabled
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name: Enabled
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value: 1
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enum/OVRUDRR:
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bit_size: 1
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variants:
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- description: No overrun/underrun error
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name: NoError
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value: 0
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- description: Overrun/underrun error detection
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name: Overrun
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value: 1
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enum/PRTCFG:
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bit_size: 2
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variants:
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- description: Free protocol. Free protocol allows to use the powerful configuration
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of the audio block to address a specific audio protocol
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name: Free
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value: 0
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- description: SPDIF protocol
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name: Spdif
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value: 1
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- description: "AC\u201997 protocol"
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name: Ac97
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value: 2
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enum/SAIEN:
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bit_size: 1
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variants:
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- description: SAI audio block disabled
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name: Disabled
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value: 0
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- description: SAI audio block enabled
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name: Enabled
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value: 1
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enum/SLOTEN:
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bit_size: 16
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variants:
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- description: Inactive slot
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name: Inactive
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value: 0
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- description: Active slot
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name: Active
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value: 1
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enum/SLOTSZ:
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bit_size: 2
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variants:
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- description: The slot size is equivalent to the data size (specified in DS[3:0]
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in the SAI_xCR1 register)
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name: DataSize
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value: 0
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- description: 16-bit
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name: Bit16
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value: 1
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- description: 32-bit
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name: Bit32
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value: 2
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enum/SYNCEN:
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bit_size: 2
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variants:
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- description: audio sub-block in asynchronous mode
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name: Asynchronous
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value: 0
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- description: audio sub-block is synchronous with the other internal audio sub-block.
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In this case, the audio sub-block must be configured in slave mode
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name: Internal
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value: 1
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- description: audio sub-block is synchronous with an external SAI embedded peripheral.
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In this case the audio sub-block should be configured in Slave mode
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name: External
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value: 2
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enum/WCKCFGIE:
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bit_size: 1
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variants:
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- description: Interrupt is disabled
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name: Disabled
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value: 0
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- description: Interrupt is enabled
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name: Enabled
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value: 1
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enum/WCKCFGR:
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bit_size: 1
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variants:
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- description: Clock configuration is correct
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name: Correct
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value: 0
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- description: Clock configuration does not respect the rule concerning the frame
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length specification
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name: Wrong
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value: 1
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fieldset/CLRFR:
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description: AClear flag register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Clear overrun / underrun
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enum_write: COVRUDRW
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name: COVRUDR
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- bit_offset: 1
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bit_size: 1
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description: Mute detection flag
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enum_write: CMUTEDETW
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name: CMUTEDET
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- bit_offset: 2
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bit_size: 1
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description: Clear wrong clock configuration flag
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enum_write: CWCKCFGW
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name: CWCKCFG
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- bit_offset: 4
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bit_size: 1
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description: Clear codec not ready flag
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enum_write: CCNRDYW
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name: CCNRDY
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- bit_offset: 5
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bit_size: 1
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description: Clear anticipated frame synchronization detection flag.
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enum_write: CAFSDETW
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name: CAFSDET
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- bit_offset: 6
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bit_size: 1
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description: Clear late frame synchronization detection flag
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enum_write: CLFSDETW
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name: CLFSDET
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fieldset/CR1:
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description: AConfiguration register 1
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fields:
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- bit_offset: 0
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bit_size: 2
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description: Audio block mode
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enum: MODE
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name: MODE
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- bit_offset: 2
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bit_size: 2
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description: Protocol configuration
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enum: PRTCFG
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name: PRTCFG
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- bit_offset: 5
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bit_size: 3
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description: Data size
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enum: DS
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name: DS
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- bit_offset: 8
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bit_size: 1
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description: Least significant bit first
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enum: LSBFIRST
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name: LSBFIRST
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- bit_offset: 9
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bit_size: 1
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description: Clock strobing edge
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enum: CKSTR
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name: CKSTR
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- bit_offset: 10
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bit_size: 2
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description: Synchronization enable
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enum: SYNCEN
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name: SYNCEN
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- bit_offset: 12
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bit_size: 1
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description: Mono mode
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enum: MONO
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name: MONO
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- bit_offset: 13
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bit_size: 1
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description: Output drive
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enum: OUTDRIV
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name: OUTDRIV
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- bit_offset: 16
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bit_size: 1
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description: Audio block A enable
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enum: SAIEN
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name: SAIEN
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- bit_offset: 17
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bit_size: 1
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description: DMA enable
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enum: DMAEN
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name: DMAEN
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- bit_offset: 19
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bit_size: 1
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description: No divider
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enum: NODIV
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name: NODIV
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- bit_offset: 20
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bit_size: 4
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description: Master clock divider
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name: MCKDIV
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fieldset/CR2:
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description: AConfiguration register 2
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fields:
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- bit_offset: 0
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bit_size: 3
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description: FIFO threshold
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enum: FTH
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name: FTH
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- bit_offset: 3
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bit_size: 1
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description: FIFO flush
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enum: FFLUSH
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name: FFLUSH
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- bit_offset: 4
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bit_size: 1
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description: Tristate management on data line
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name: TRIS
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- bit_offset: 5
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bit_size: 1
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description: Mute
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enum: MUTE
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name: MUTE
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- bit_offset: 6
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bit_size: 1
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description: Mute value
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enum: MUTEVAL
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name: MUTEVAL
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- bit_offset: 7
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bit_size: 6
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description: Mute counter
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name: MUTECN
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- bit_offset: 13
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bit_size: 1
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description: Complement bit
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enum: CPL
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name: CPL
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- bit_offset: 14
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bit_size: 2
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description: Companding mode
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enum: COMP
|
|
name: COMP
|
|
fieldset/DR:
|
|
description: AData register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 32
|
|
description: Data
|
|
name: DATA
|
|
fieldset/FRCR:
|
|
description: AFRCR
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 8
|
|
description: Frame length
|
|
name: FRL
|
|
- bit_offset: 8
|
|
bit_size: 7
|
|
description: Frame synchronization active level length
|
|
name: FSALL
|
|
- bit_offset: 16
|
|
bit_size: 1
|
|
description: Frame synchronization definition
|
|
name: FSDEF
|
|
- bit_offset: 17
|
|
bit_size: 1
|
|
description: Frame synchronization polarity
|
|
enum: FSPOL
|
|
name: FSPOL
|
|
- bit_offset: 18
|
|
bit_size: 1
|
|
description: Frame synchronization offset
|
|
enum: FSOFF
|
|
name: FSOFF
|
|
fieldset/GCR:
|
|
description: Global configuration register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 2
|
|
description: Synchronization inputs
|
|
name: SYNCIN
|
|
- bit_offset: 4
|
|
bit_size: 2
|
|
description: Synchronization outputs
|
|
name: SYNCOUT
|
|
fieldset/IM:
|
|
description: AInterrupt mask register2
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 1
|
|
description: Overrun/underrun interrupt enable
|
|
enum: OVRUDRIE
|
|
name: OVRUDRIE
|
|
- bit_offset: 1
|
|
bit_size: 1
|
|
description: Mute detection interrupt enable
|
|
enum: MUTEDETIE
|
|
name: MUTEDETIE
|
|
- bit_offset: 2
|
|
bit_size: 1
|
|
description: Wrong clock configuration interrupt enable
|
|
enum: WCKCFGIE
|
|
name: WCKCFGIE
|
|
- bit_offset: 3
|
|
bit_size: 1
|
|
description: FIFO request interrupt enable
|
|
enum: FREQIE
|
|
name: FREQIE
|
|
- bit_offset: 4
|
|
bit_size: 1
|
|
description: Codec not ready interrupt enable
|
|
enum: CNRDYIE
|
|
name: CNRDYIE
|
|
- bit_offset: 5
|
|
bit_size: 1
|
|
description: Anticipated frame synchronization detection interrupt enable
|
|
enum: AFSDETIE
|
|
name: AFSDETIE
|
|
- bit_offset: 6
|
|
bit_size: 1
|
|
description: Late frame synchronization detection interrupt enable
|
|
enum: LFSDETIE
|
|
name: LFSDETIE
|
|
fieldset/SLOTR:
|
|
description: ASlot register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 5
|
|
description: First bit offset
|
|
name: FBOFF
|
|
- bit_offset: 6
|
|
bit_size: 2
|
|
description: Slot size
|
|
enum: SLOTSZ
|
|
name: SLOTSZ
|
|
- bit_offset: 8
|
|
bit_size: 4
|
|
description: Number of slots in an audio frame
|
|
name: NBSLOT
|
|
- bit_offset: 16
|
|
bit_size: 16
|
|
description: Slot enable
|
|
enum: SLOTEN
|
|
name: SLOTEN
|
|
fieldset/SR:
|
|
description: AStatus register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 1
|
|
description: Overrun / underrun
|
|
enum_read: OVRUDRR
|
|
name: OVRUDR
|
|
- bit_offset: 1
|
|
bit_size: 1
|
|
description: Mute detection
|
|
enum_read: MUTEDETR
|
|
name: MUTEDET
|
|
- bit_offset: 2
|
|
bit_size: 1
|
|
description: Wrong clock configuration flag. This bit is read only.
|
|
enum_read: WCKCFGR
|
|
name: WCKCFG
|
|
- bit_offset: 3
|
|
bit_size: 1
|
|
description: FIFO request
|
|
enum_read: FREQR
|
|
name: FREQ
|
|
- bit_offset: 4
|
|
bit_size: 1
|
|
description: Codec not ready
|
|
enum_read: CNRDYR
|
|
name: CNRDY
|
|
- bit_offset: 5
|
|
bit_size: 1
|
|
description: Anticipated frame synchronization detection
|
|
enum_read: AFSDETR
|
|
name: AFSDET
|
|
- bit_offset: 6
|
|
bit_size: 1
|
|
description: Late frame synchronization detection
|
|
enum_read: LFSDETR
|
|
name: LFSDET
|
|
- bit_offset: 16
|
|
bit_size: 3
|
|
description: FIFO level threshold
|
|
enum_read: FLVLR
|
|
name: FLVL
|