183 lines
3.9 KiB
YAML
183 lines
3.9 KiB
YAML
---
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block/PWR:
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description: Power control
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items:
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- byte_offset: 0
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description: power control register
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fieldset: CR1
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name: CR1
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- byte_offset: 4
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description: power control/status register
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fieldset: CSR1
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name: CSR1
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- byte_offset: 8
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description: power control register
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fieldset: CR2
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name: CR2
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- byte_offset: 12
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description: power control/status register
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fieldset: CSR2
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name: CSR2
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enum/PDDS:
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bit_size: 1
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variants:
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- description: Enter Stop mode when the CPU enters deepsleep
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name: STOP_MODE
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value: 0
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- description: Enter Standby mode when the CPU enters deepsleep
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name: STANDBY_MODE
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value: 1
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enum/VOS:
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bit_size: 2
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variants:
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- description: Scale 3 mode
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name: SCALE3
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value: 1
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- description: Scale 2 mode
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name: SCALE2
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value: 2
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- description: Scale 1 mode (reset value)
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name: SCALE1
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value: 3
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fieldset/CR1:
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description: power control register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Low-power deep sleep
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name: LPDS
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- bit_offset: 1
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bit_size: 1
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description: Power down deepsleep
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enum: PDDS
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name: PDDS
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- bit_offset: 3
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bit_size: 1
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description: Clear standby flag
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name: CSBF
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- bit_offset: 4
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bit_size: 1
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description: Power voltage detector enable
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name: PVDE
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- bit_offset: 5
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bit_size: 3
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description: PVD level selection
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name: PLS
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- bit_offset: 8
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bit_size: 1
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description: Disable backup domain write protection
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name: DBP
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- bit_offset: 9
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bit_size: 1
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description: Flash power down in Stop mode
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name: FPDS
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- bit_offset: 10
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bit_size: 1
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description: Low-power regulator in deepsleep under-drive mode
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name: LPUDS
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- bit_offset: 11
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bit_size: 1
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description: Main regulator in deepsleep under-drive mode
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name: MRUDS
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- array:
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len: 1
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stride: 0
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bit_offset: 13
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bit_size: 1
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description: ADCDC1
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name: ADCDC
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- bit_offset: 14
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bit_size: 2
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description: Regulator voltage scaling output selection
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enum: VOS
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name: VOS
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- bit_offset: 16
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bit_size: 1
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description: Over-drive enable
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name: ODEN
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- bit_offset: 17
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bit_size: 1
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description: Over-drive switching enabled
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name: ODSWEN
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- bit_offset: 18
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bit_size: 2
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description: Under-drive enable in stop mode
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name: UDEN
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fieldset/CR2:
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description: power control register
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fields:
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- array:
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len: 6
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stride: 1
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bit_offset: 0
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bit_size: 1
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description: Clear Wakeup Pin flag for PA0
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name: CWUPF
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- array:
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len: 6
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stride: 1
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bit_offset: 8
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bit_size: 1
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description: Wakeup pin polarity bit for PA0
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name: WUPP
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fieldset/CSR1:
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description: power control/status register
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fields:
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- bit_offset: 0
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bit_size: 1
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description: Wakeup internal flag
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name: WUIF
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- bit_offset: 1
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bit_size: 1
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description: Standby flag
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name: SBF
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- bit_offset: 2
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bit_size: 1
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description: PVD output
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name: PVDO
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- bit_offset: 3
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bit_size: 1
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description: Backup regulator ready
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name: BRR
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- bit_offset: 8
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bit_size: 1
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description: Enable internal wakeup
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name: EIWUP
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- bit_offset: 9
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bit_size: 1
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description: Backup regulator enable
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name: BRE
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- bit_offset: 14
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bit_size: 1
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description: Regulator voltage scaling output selection ready bit
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name: VOSRDY
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- bit_offset: 16
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bit_size: 1
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description: Over-drive mode ready
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name: ODRDY
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- bit_offset: 17
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bit_size: 1
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description: Over-drive mode switching ready
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name: ODSWRDY
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- bit_offset: 18
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bit_size: 2
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description: Under-drive ready flag
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name: UDRDY
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fieldset/CSR2:
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description: power control/status register
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fields:
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- array:
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len: 6
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stride: 1
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bit_offset: 0
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bit_size: 1
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description: Wakeup Pin flag for PA0
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name: WUPF
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- array:
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len: 6
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stride: 1
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bit_offset: 8
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bit_size: 1
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description: Enable Wakeup pin for PA0
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name: EWUP
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