1026 lines
24 KiB
YAML
1026 lines
24 KiB
YAML
---
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block/ETH:
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description: 'Ethernet: media access control (MAC)'
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items:
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- byte_offset: 0
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description: Ethernet MAC configuration register
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fieldset: MACCR
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name: MACCR
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- byte_offset: 4
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description: Ethernet MAC frame filter register
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fieldset: MACFFR
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name: MACFFR
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- byte_offset: 8
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description: Ethernet MAC hash table high register
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fieldset: MACHTHR
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name: MACHTHR
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- byte_offset: 12
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description: Ethernet MAC hash table low register
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fieldset: MACHTLR
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name: MACHTLR
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- byte_offset: 16
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description: Ethernet MAC MII address register
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fieldset: MACMIIAR
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name: MACMIIAR
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- byte_offset: 20
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description: Ethernet MAC MII data register
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fieldset: MACMIIDR
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name: MACMIIDR
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- byte_offset: 24
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description: Ethernet MAC flow control register
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fieldset: MACFCR
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name: MACFCR
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- byte_offset: 28
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description: Ethernet MAC VLAN tag register
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fieldset: MACVLANTR
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name: MACVLANTR
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- byte_offset: 44
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description: Ethernet MAC PMT control and status register
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fieldset: MACPMTCSR
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name: MACPMTCSR
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- access: Read
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byte_offset: 52
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description: Ethernet MAC debug register
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fieldset: MACDBGR
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name: MACDBGR
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- byte_offset: 56
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description: Ethernet MAC interrupt status register
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fieldset: MACSR
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name: MACSR
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- byte_offset: 60
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description: Ethernet MAC interrupt mask register
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fieldset: MACIMR
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name: MACIMR
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- byte_offset: 64
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description: Ethernet MAC address 0 high register
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fieldset: MACA0HR
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name: MACA0HR
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- byte_offset: 68
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description: Ethernet MAC address 0 low register
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fieldset: MACA0LR
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name: MACA0LR
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- byte_offset: 72
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description: Ethernet MAC address 1 high register
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fieldset: MACA1HR
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name: MACA1HR
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- byte_offset: 76
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description: Ethernet MAC address1 low register
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fieldset: MACA1LR
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name: MACA1LR
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- byte_offset: 80
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description: Ethernet MAC address 2 high register
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fieldset: MACA2HR
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name: MACA2HR
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- byte_offset: 84
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description: Ethernet MAC address 2 low register
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fieldset: MACA2LR
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name: MACA2LR
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- byte_offset: 88
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description: Ethernet MAC address 3 high register
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fieldset: MACA3HR
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name: MACA3HR
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- byte_offset: 92
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description: Ethernet MAC address 3 low register
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fieldset: MACA3LR
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name: MACA3LR
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- byte_offset: 96
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description: Ethernet MAC remote wakeup frame filter register
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name: MACRWUFFER
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enum/APCS:
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bit_size: 1
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variants:
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- description: MAC passes all incoming frames unmodified
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name: Disabled
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value: 0
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- description: MAC strips the Pad/FCS field on incoming frames only for lengths
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less than or equal to 1500 bytes
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name: Strip
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value: 1
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enum/BFD:
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bit_size: 1
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variants:
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- description: Address filters pass all received broadcast frames
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name: Enabled
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value: 0
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- description: Address filters filter all incoming broadcast frames
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name: Disabled
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value: 1
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enum/BL:
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bit_size: 2
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variants:
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- description: For retransmission n, wait up to 2^min(n, 10) time slots
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name: BL10
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value: 0
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- description: For retransmission n, wait up to 2^min(n, 8) time slots
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name: BL8
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value: 1
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- description: For retransmission n, wait up to 2^min(n, 4) time slots
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name: BL4
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value: 2
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- description: For retransmission n, wait up to 2^min(n, 1) time slots
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name: BL1
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value: 3
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enum/CR:
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bit_size: 3
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variants:
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- description: 60-100MHz HCLK/42
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name: CR_60_100
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value: 0
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- description: 100-150 MHz HCLK/62
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name: CR_100_150
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value: 1
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- description: 20-35MHz HCLK/16
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name: CR_20_35
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value: 2
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- description: 35-60MHz HCLK/16
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name: CR_35_60
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value: 3
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- description: 150-168MHz HCLK/102
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name: CR_150_168
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value: 4
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enum/CSD:
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bit_size: 1
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variants:
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- description: Errors generated due to loss of carrier
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name: Enabled
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value: 0
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- description: No error generated due to loss of carrier
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name: Disabled
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value: 1
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enum/CSTF:
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bit_size: 1
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variants:
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- description: CRC not stripped
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name: Disabled
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value: 0
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- description: CRC stripped
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name: Enabled
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value: 1
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enum/DAIF:
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bit_size: 1
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variants:
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- description: Normal filtering of frames
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name: Normal
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value: 0
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- description: Address check block operates in inverse filtering mode for the DA
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address comparison
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name: Invert
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value: 1
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enum/DC:
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bit_size: 1
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variants:
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- description: MAC defers until CRS signal goes inactive
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name: Disabled
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value: 0
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- description: Deferral check function enabled
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name: Enabled
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value: 1
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enum/DM:
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bit_size: 1
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variants:
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- description: MAC operates in half-duplex mode
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name: HalfDuplex
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value: 0
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- description: MAC operates in full-duplex mode
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name: FullDuplex
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value: 1
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enum/FCB:
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bit_size: 1
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variants:
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- description: In half duplex only, deasserts back pressure
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name: DisableBackPressure
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value: 0
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- description: In full duplex, initiate a Pause control frame. In half duplex, assert
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back pressure
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name: PauseOrBackPressure
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value: 1
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enum/FES:
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bit_size: 1
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variants:
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- description: 10 Mbit/s
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name: FES10
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value: 0
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- description: 100 Mbit/s
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name: FES100
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value: 1
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enum/GU:
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bit_size: 1
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variants:
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- description: Normal operation
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name: Disabled
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value: 0
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- description: Any unicast packet filtered by the MAC address recognition may be
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a wakeup frame
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name: Enabled
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value: 1
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enum/HM:
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bit_size: 1
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variants:
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- description: MAC performs a perfect destination address filtering for multicast
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frames
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name: Perfect
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value: 0
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- description: MAC performs destination address filtering of received multicast
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frames according to the hash table
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name: Hash
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value: 1
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enum/HPF:
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bit_size: 1
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variants:
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- description: If HM or HU is set, only frames that match the Hash filter are passed
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name: HashOnly
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value: 0
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- description: If HM or HU is set, frames that match either the perfect filter or
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the hash filter are passed
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name: HashOrPerfect
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value: 1
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enum/HU:
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bit_size: 1
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variants:
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- description: MAC performs a perfect destination address filtering for unicast
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frames
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name: Perfect
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value: 0
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- description: MAC performs destination address filtering of received unicast frames
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according to the hash table
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name: Hash
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value: 1
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enum/IFG:
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bit_size: 3
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variants:
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- description: 96 bit times
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name: IFG96
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value: 0
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- description: 88 bit times
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name: IFG88
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value: 1
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- description: 80 bit times
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name: IFG80
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value: 2
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- description: 72 bit times
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name: IFG72
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value: 3
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- description: 64 bit times
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name: IFG64
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value: 4
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- description: 56 bit times
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name: IFG56
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value: 5
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- description: 48 bit times
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name: IFG48
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value: 6
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- description: 40 bit times
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name: IFG40
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value: 7
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enum/IPCO:
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bit_size: 1
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variants:
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- description: IPv4 checksum offload disabled
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name: Disabled
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value: 0
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- description: IPv4 checksums are checked in received frames
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name: Offload
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value: 1
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enum/JD:
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bit_size: 1
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variants:
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- description: Jabber enabled, transmit frames up to 2048 bytes
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name: Enabled
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value: 0
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- description: Jabber disabled, transmit frames up to 16384 bytes
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name: Disabled
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value: 1
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enum/LM:
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bit_size: 1
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variants:
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- description: Normal mode
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name: Normal
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value: 0
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- description: MAC operates in loopback mode at the MII
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name: Loopback
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value: 1
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enum/MACAHR_AE:
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bit_size: 1
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variants:
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- description: Address filters ignore this address
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name: Disabled
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value: 0
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- description: Address filters use this address
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name: Enabled
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value: 1
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enum/MACAHR_SA:
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bit_size: 1
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variants:
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- description: This address is used for comparison with DA fields of the received
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frame
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name: Destination
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value: 0
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- description: This address is used for comparison with SA fields of received frames
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name: Source
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value: 1
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enum/MB:
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bit_size: 1
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variants:
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- description: This bit is set to 1 by the application to indicate that a read or
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write access is in progress
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name: Busy
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value: 1
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enum/MPE:
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bit_size: 1
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variants:
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- description: No power management event generated due to Magic Packet reception
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name: Disabled
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value: 0
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- description: Enable generation of a power management event due to Magic Packet
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reception
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name: Enabled
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value: 1
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enum/MW:
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bit_size: 1
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variants:
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- description: Read operation
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name: Read
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value: 0
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- description: Write operation
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name: Write
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value: 1
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enum/PAM:
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bit_size: 1
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variants:
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- description: Filtering of multicast frames depends on HM
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name: Disabled
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value: 0
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- description: All received frames with a multicast destination address are passed
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name: Enabled
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value: 1
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enum/PCF:
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bit_size: 2
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variants:
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- description: MAC prevents all control frames from reaching the application
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name: PreventAll
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value: 0
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- description: MAC forwards all control frames to application except Pause
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name: ForwardAllExceptPause
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value: 1
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- description: MAC forwards all control frames to application even if they fail
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the address filter
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name: ForwardAll
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value: 2
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- description: MAC forwards control frames that pass the address filter
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name: ForwardAllFiltered
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value: 3
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enum/PD:
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bit_size: 1
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variants:
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- description: All received frames will be dropped. Cleared automatically when a
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magic packet or wakeup frame is received
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name: Enabled
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value: 1
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enum/PLT:
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bit_size: 2
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variants:
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- description: Pause time minus 4 slot times
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name: PLT4
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value: 0
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- description: Pause time minus 28 slot times
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name: PLT28
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value: 1
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- description: Pause time minus 144 slot times
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name: PLT144
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value: 2
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- description: Pause time minus 256 slot times
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name: PLT256
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value: 3
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enum/PM:
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bit_size: 1
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variants:
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- description: Normal address filtering
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name: Disabled
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value: 0
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- description: Address filters pass all incoming frames regardless of their destination
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or source address
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name: Enabled
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value: 1
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enum/PMTIM:
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bit_size: 1
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variants:
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- description: PMT Status interrupt generation enabled
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name: Unmasked
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value: 0
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- description: PMT Status interrupt generation disabled
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name: Masked
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value: 1
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enum/RA:
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bit_size: 1
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variants:
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- description: MAC receiver passes on to the application only those frames that
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have passed the SA/DA address file
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name: Disabled
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value: 0
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- description: MAC receiver passes oll received frames on to the application
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name: Enabled
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value: 1
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enum/RD:
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bit_size: 1
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variants:
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- description: MAC attempts retries based on the settings of BL
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name: Enabled
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value: 0
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- description: MAC attempts only 1 transmission
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name: Disabled
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value: 1
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enum/RE:
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bit_size: 1
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variants:
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- description: MAC receive state machine is disabled after the completion of the
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reception of the current frame
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name: Disabled
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value: 0
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- description: MAC receive state machine is enabled
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name: Enabled
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value: 1
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enum/RFCE:
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bit_size: 1
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variants:
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- description: Pause frames are not decoded
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name: Disabled
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value: 0
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- description: MAC decodes received Pause frames and disables its transmitted for
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a specified time
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name: Enabled
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value: 1
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enum/ROD:
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bit_size: 1
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variants:
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- description: MAC receives all packets from PHY while transmitting
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name: Enabled
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value: 0
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- description: MAC disables reception of frames in half-duplex mode
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name: Disabled
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value: 1
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enum/SAF:
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bit_size: 1
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variants:
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- description: Source address ignored
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name: Disabled
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value: 0
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- description: MAC drops frames that fail the source address filter
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name: Enabled
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value: 1
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enum/SAIF:
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bit_size: 1
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variants:
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- description: Source address filter operates normally
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name: Normal
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value: 0
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- description: Source address filter operation inverted
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name: Invert
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value: 1
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enum/TE:
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bit_size: 1
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variants:
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- description: MAC transmit state machine is disabled after completion of the transmission
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of the current frame
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name: Disabled
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value: 0
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- description: MAC transmit state machine is enabled
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name: Enabled
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value: 1
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enum/TFCE:
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bit_size: 1
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variants:
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- description: In full duplex, flow control is disabled. In half duplex, back pressure
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is disabled
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name: Disabled
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value: 0
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- description: In full duplex, flow control is enabled. In half duplex, back pressure
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is enabled
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name: Enabled
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value: 1
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enum/TSTIM:
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bit_size: 1
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variants:
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- description: Time stamp interrupt generation enabled
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name: Unmasked
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value: 0
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- description: Time stamp interrupt generation disabled
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name: Masked
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value: 1
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enum/UPFD:
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bit_size: 1
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variants:
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- description: MAC detects only a Pause frame with the multicast address specified
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in the 802.3x standard
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name: Disabled
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value: 0
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- description: MAC additionally detects Pause frames with the station's unicast
|
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address
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name: Enabled
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value: 1
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enum/VLANTC:
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bit_size: 1
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variants:
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- description: Full 16 bit VLAN identifiers are used for comparison and filtering
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name: VLANTC16
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value: 0
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- description: 12 bit VLAN identifies are used for comparison and filtering
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name: VLANTC12
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value: 1
|
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enum/WD:
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bit_size: 1
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variants:
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- description: Watchdog enabled, receive frames limited to 2048 bytes
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name: Enabled
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value: 0
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- description: Watchdog disabled, receive frames may be up to to 16384 bytes
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name: Disabled
|
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value: 1
|
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enum/WFE:
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bit_size: 1
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variants:
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- description: No power management event generated due to wakeup frame reception
|
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name: Disabled
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value: 0
|
|
- description: Enable generation of a power management event due to wakeup frame
|
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reception
|
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name: Enabled
|
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value: 1
|
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enum/WFFRPR:
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bit_size: 1
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variants:
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- description: Reset wakeup frame filter register point to 0b000. Automatically
|
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cleared
|
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name: Reset
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value: 1
|
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enum/ZQPD:
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bit_size: 1
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variants:
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- description: Normal operation with automatic zero-quanta pause control frame generation
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name: Enabled
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value: 0
|
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- description: Automatic generation of zero-quanta pause control frames is disabled
|
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name: Disabled
|
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value: 1
|
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fieldset/MACA0HR:
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description: Ethernet MAC address 0 high register
|
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fields:
|
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- bit_offset: 0
|
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bit_size: 16
|
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description: MAC address0 high
|
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name: MACA0H
|
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- bit_offset: 31
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bit_size: 1
|
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description: Always 1
|
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name: MO
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fieldset/MACA0LR:
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description: Ethernet MAC address 0 low register
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fields:
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- bit_offset: 0
|
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bit_size: 32
|
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description: '0'
|
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name: MACA0L
|
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fieldset/MACA1HR:
|
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description: Ethernet MAC address 1 high register
|
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fields:
|
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- bit_offset: 0
|
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bit_size: 16
|
|
description: MACA1H
|
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name: MACA1H
|
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- bit_offset: 24
|
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bit_size: 6
|
|
description: MBC
|
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name: MBC
|
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- bit_offset: 30
|
|
bit_size: 1
|
|
description: SA
|
|
enum: MACAHR_SA
|
|
name: SA
|
|
- bit_offset: 31
|
|
bit_size: 1
|
|
description: AE
|
|
enum: MACAHR_AE
|
|
name: AE
|
|
fieldset/MACA1LR:
|
|
description: Ethernet MAC address1 low register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 32
|
|
description: MACA1LR
|
|
name: MACA1L
|
|
fieldset/MACA2HR:
|
|
description: Ethernet MAC address 2 high register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 16
|
|
description: MAC2AH
|
|
name: MACA2H
|
|
- bit_offset: 24
|
|
bit_size: 6
|
|
description: MBC
|
|
name: MBC
|
|
- bit_offset: 30
|
|
bit_size: 1
|
|
description: SA
|
|
enum: MACAHR_SA
|
|
name: SA
|
|
- bit_offset: 31
|
|
bit_size: 1
|
|
description: AE
|
|
enum: MACAHR_AE
|
|
name: AE
|
|
fieldset/MACA2LR:
|
|
description: Ethernet MAC address 2 low register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 32
|
|
description: MACA2L
|
|
name: MACA2L
|
|
fieldset/MACA3HR:
|
|
description: Ethernet MAC address 3 high register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 16
|
|
description: MACA3H
|
|
name: MACA3H
|
|
- bit_offset: 24
|
|
bit_size: 6
|
|
description: MBC
|
|
name: MBC
|
|
- bit_offset: 30
|
|
bit_size: 1
|
|
description: SA
|
|
enum: MACAHR_SA
|
|
name: SA
|
|
- bit_offset: 31
|
|
bit_size: 1
|
|
description: AE
|
|
enum: MACAHR_AE
|
|
name: AE
|
|
fieldset/MACA3LR:
|
|
description: Ethernet MAC address 3 low register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 32
|
|
description: MBCA3L
|
|
name: MACA3L
|
|
fieldset/MACCR:
|
|
description: Ethernet MAC configuration register
|
|
fields:
|
|
- bit_offset: 2
|
|
bit_size: 1
|
|
description: Receiver enable
|
|
enum: RE
|
|
name: RE
|
|
- bit_offset: 3
|
|
bit_size: 1
|
|
description: Transmitter enable
|
|
enum: TE
|
|
name: TE
|
|
- bit_offset: 4
|
|
bit_size: 1
|
|
description: Deferral check
|
|
enum: DC
|
|
name: DC
|
|
- bit_offset: 5
|
|
bit_size: 2
|
|
description: Back-off limit
|
|
enum: BL
|
|
name: BL
|
|
- bit_offset: 7
|
|
bit_size: 1
|
|
description: Automatic pad/CRC stripping
|
|
enum: APCS
|
|
name: APCS
|
|
- bit_offset: 9
|
|
bit_size: 1
|
|
description: Retry disable
|
|
enum: RD
|
|
name: RD
|
|
- bit_offset: 10
|
|
bit_size: 1
|
|
description: IPv4 checksum offload
|
|
enum: IPCO
|
|
name: IPCO
|
|
- bit_offset: 11
|
|
bit_size: 1
|
|
description: Duplex mode
|
|
enum: DM
|
|
name: DM
|
|
- bit_offset: 12
|
|
bit_size: 1
|
|
description: Loopback mode
|
|
enum: LM
|
|
name: LM
|
|
- bit_offset: 13
|
|
bit_size: 1
|
|
description: Receive own disable
|
|
enum: ROD
|
|
name: ROD
|
|
- bit_offset: 14
|
|
bit_size: 1
|
|
description: Fast Ethernet speed
|
|
enum: FES
|
|
name: FES
|
|
- bit_offset: 16
|
|
bit_size: 1
|
|
description: Carrier sense disable
|
|
enum: CSD
|
|
name: CSD
|
|
- bit_offset: 17
|
|
bit_size: 3
|
|
description: Interframe gap
|
|
enum: IFG
|
|
name: IFG
|
|
- bit_offset: 22
|
|
bit_size: 1
|
|
description: Jabber disable
|
|
enum: JD
|
|
name: JD
|
|
- bit_offset: 23
|
|
bit_size: 1
|
|
description: Watchdog disable
|
|
enum: WD
|
|
name: WD
|
|
- bit_offset: 25
|
|
bit_size: 1
|
|
description: CRC stripping for type frames
|
|
enum: CSTF
|
|
name: CSTF
|
|
fieldset/MACDBGR:
|
|
description: Ethernet MAC debug register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 1
|
|
description: MAC MII receive protocol engine active
|
|
name: MMRPEA
|
|
- bit_offset: 1
|
|
bit_size: 2
|
|
description: MAC small FIFO read/write controllers status
|
|
name: MSFRWCS
|
|
- bit_offset: 4
|
|
bit_size: 1
|
|
description: Rx FIFO write controller active
|
|
name: RFWRA
|
|
- bit_offset: 5
|
|
bit_size: 2
|
|
description: Rx FIFO read controller status
|
|
name: RFRCS
|
|
- bit_offset: 8
|
|
bit_size: 2
|
|
description: Rx FIFO fill level
|
|
name: RFFL
|
|
- bit_offset: 16
|
|
bit_size: 1
|
|
description: MAC MII transmit engine active
|
|
name: MMTEA
|
|
- bit_offset: 17
|
|
bit_size: 2
|
|
description: MAC transmit frame controller status
|
|
name: MTFCS
|
|
- bit_offset: 19
|
|
bit_size: 1
|
|
description: MAC transmitter in pause
|
|
name: MTP
|
|
- bit_offset: 20
|
|
bit_size: 2
|
|
description: Tx FIFO read status
|
|
name: TFRS
|
|
- bit_offset: 22
|
|
bit_size: 1
|
|
description: Tx FIFO write active
|
|
name: TFWA
|
|
- bit_offset: 24
|
|
bit_size: 1
|
|
description: Tx FIFO not empty
|
|
name: TFNE
|
|
- bit_offset: 25
|
|
bit_size: 1
|
|
description: Tx FIFO full
|
|
name: TFF
|
|
fieldset/MACFCR:
|
|
description: Ethernet MAC flow control register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 1
|
|
description: Flow control busy/back pressure activate
|
|
enum: FCB
|
|
name: FCB
|
|
- bit_offset: 1
|
|
bit_size: 1
|
|
description: Transmit flow control enable
|
|
enum: TFCE
|
|
name: TFCE
|
|
- bit_offset: 2
|
|
bit_size: 1
|
|
description: Receive flow control enable
|
|
enum: RFCE
|
|
name: RFCE
|
|
- bit_offset: 3
|
|
bit_size: 1
|
|
description: Unicast pause frame detect
|
|
enum: UPFD
|
|
name: UPFD
|
|
- bit_offset: 4
|
|
bit_size: 2
|
|
description: Pause low threshold
|
|
enum: PLT
|
|
name: PLT
|
|
- bit_offset: 7
|
|
bit_size: 1
|
|
description: Zero-quanta pause disable
|
|
enum: ZQPD
|
|
name: ZQPD
|
|
- bit_offset: 16
|
|
bit_size: 16
|
|
description: Pause time
|
|
name: PT
|
|
fieldset/MACFFR:
|
|
description: Ethernet MAC frame filter register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 1
|
|
description: Promiscuous mode
|
|
enum: PM
|
|
name: PM
|
|
- bit_offset: 1
|
|
bit_size: 1
|
|
description: Hash unicast
|
|
enum: HU
|
|
name: HU
|
|
- bit_offset: 2
|
|
bit_size: 1
|
|
description: Hash multicast
|
|
enum: HM
|
|
name: HM
|
|
- bit_offset: 3
|
|
bit_size: 1
|
|
description: Destination address unique filtering
|
|
enum: DAIF
|
|
name: DAIF
|
|
- bit_offset: 4
|
|
bit_size: 1
|
|
description: Pass all multicast
|
|
enum: PAM
|
|
name: PAM
|
|
- bit_offset: 5
|
|
bit_size: 1
|
|
description: Broadcast frames disable
|
|
enum: BFD
|
|
name: BFD
|
|
- bit_offset: 6
|
|
bit_size: 2
|
|
description: Pass control frames
|
|
enum: PCF
|
|
name: PCF
|
|
- bit_offset: 7
|
|
bit_size: 1
|
|
description: Source address inverse filtering
|
|
enum: SAIF
|
|
name: SAIF
|
|
- bit_offset: 8
|
|
bit_size: 1
|
|
description: Source address filter
|
|
enum: SAF
|
|
name: SAF
|
|
- bit_offset: 9
|
|
bit_size: 1
|
|
description: Hash or perfect filter
|
|
enum: HPF
|
|
name: HPF
|
|
- bit_offset: 31
|
|
bit_size: 1
|
|
description: Receive all
|
|
enum: RA
|
|
name: RA
|
|
fieldset/MACHTHR:
|
|
description: Ethernet MAC hash table high register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 32
|
|
description: Upper 32 bits of hash table
|
|
name: HTH
|
|
fieldset/MACHTLR:
|
|
description: Ethernet MAC hash table low register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 32
|
|
description: Lower 32 bits of hash table
|
|
name: HTL
|
|
fieldset/MACIMR:
|
|
description: Ethernet MAC interrupt mask register
|
|
fields:
|
|
- bit_offset: 3
|
|
bit_size: 1
|
|
description: PMT interrupt mask
|
|
enum: PMTIM
|
|
name: PMTIM
|
|
- bit_offset: 9
|
|
bit_size: 1
|
|
description: Time stamp trigger interrupt mask
|
|
enum: TSTIM
|
|
name: TSTIM
|
|
fieldset/MACMIIAR:
|
|
description: Ethernet MAC MII address register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 1
|
|
description: MII busy
|
|
enum: MB
|
|
name: MB
|
|
- bit_offset: 1
|
|
bit_size: 1
|
|
description: MII write
|
|
enum: MW
|
|
name: MW
|
|
- bit_offset: 2
|
|
bit_size: 3
|
|
description: Clock range
|
|
enum: CR
|
|
name: CR
|
|
- bit_offset: 6
|
|
bit_size: 5
|
|
description: MII register - select the desired MII register in the PHY device
|
|
name: MR
|
|
- bit_offset: 11
|
|
bit_size: 5
|
|
description: PHY address - select which of possible 32 PHYs is being accessed
|
|
name: PA
|
|
fieldset/MACMIIDR:
|
|
description: Ethernet MAC MII data register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 16
|
|
description: MII data read from/written to the PHY
|
|
name: MD
|
|
fieldset/MACPMTCSR:
|
|
description: Ethernet MAC PMT control and status register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 1
|
|
description: Power down
|
|
enum: PD
|
|
name: PD
|
|
- bit_offset: 1
|
|
bit_size: 1
|
|
description: Magic packet enable
|
|
enum: MPE
|
|
name: MPE
|
|
- bit_offset: 2
|
|
bit_size: 1
|
|
description: Wakeup frame enable
|
|
enum: WFE
|
|
name: WFE
|
|
- bit_offset: 5
|
|
bit_size: 1
|
|
description: Magic packet received
|
|
name: MPR
|
|
- bit_offset: 6
|
|
bit_size: 1
|
|
description: Wakeup frame received
|
|
name: WFR
|
|
- bit_offset: 9
|
|
bit_size: 1
|
|
description: Global unicast
|
|
enum: GU
|
|
name: GU
|
|
- bit_offset: 31
|
|
bit_size: 1
|
|
description: Wakeup frame filter register pointer reset
|
|
enum: WFFRPR
|
|
name: WFFRPR
|
|
fieldset/MACSR:
|
|
description: Ethernet MAC interrupt status register
|
|
fields:
|
|
- bit_offset: 3
|
|
bit_size: 1
|
|
description: PMT status
|
|
name: PMTS
|
|
- bit_offset: 4
|
|
bit_size: 1
|
|
description: MMC status
|
|
name: MMCS
|
|
- bit_offset: 5
|
|
bit_size: 1
|
|
description: MMC receive status
|
|
name: MMCRS
|
|
- bit_offset: 6
|
|
bit_size: 1
|
|
description: MMC transmit status
|
|
name: MMCTS
|
|
- bit_offset: 9
|
|
bit_size: 1
|
|
description: Time stamp trigger status
|
|
name: TSTS
|
|
fieldset/MACVLANTR:
|
|
description: Ethernet MAC VLAN tag register
|
|
fields:
|
|
- bit_offset: 0
|
|
bit_size: 16
|
|
description: VLAN tag identifier (for receive frames)
|
|
name: VLANTI
|
|
- bit_offset: 16
|
|
bit_size: 1
|
|
description: 12-bit VLAN tag comparison
|
|
enum: VLANTC
|
|
name: VLANTC
|