stm32-data/data/registers/dbgmcu_u5.yaml

block/DBGMCU:
  description: MCU debug component
  items:
  - name: IDCODE
    description: DBGMCU_IDCODE
    byte_offset: 0
    access: Read
    fieldset: IDCODE
  - name: CR
    description: "Debug MCU configuration\r register"
    byte_offset: 4
    fieldset: CR
  - name: APB1LFZR
    description: "Debug MCU APB1L peripheral freeze\r register"
    byte_offset: 8
    fieldset: APB1LFZR
  - name: APB1HFZR
    description: Debug MCU APB1H peripheral freeze register
    byte_offset: 12
    fieldset: APB1HFZR
  - name: APB2FZR
    description: Debug MCU APB2 peripheral freeze register
    byte_offset: 16
    fieldset: APB2FZR
  - name: APB3FZR
    description: Debug MCU APB3 peripheral freeze register
    byte_offset: 20
    fieldset: APB3FZR
  - name: AHB1FZR
    description: Debug MCU AHB1 peripheral freeze register
    byte_offset: 32
    fieldset: AHB1FZR
  - name: AHB3FZR
    description: Debug MCU AHB3 peripheral freeze register
    byte_offset: 40
    fieldset: AHB3FZR
  - name: DBGMCU_SR
    description: DBGMCU status register
    byte_offset: 252
    access: Read
    fieldset: DBGMCU_SR
  - name: DBGMCU_DBG_AUTH_HOST
    description: DBGMCU debug host authentication register
    byte_offset: 256
    access: Read
    fieldset: DBGMCU_DBG_AUTH_HOST
  - name: DBGMCU_DBG_AUTH_DEVICE
    description: DBGMCU debug device authentication register
    byte_offset: 260
    access: Read
    fieldset: DBGMCU_DBG_AUTH_DEVICE
  - name: PIDR4
    description: Debug MCU CoreSight peripheral identity register 4
    byte_offset: 4048
    access: Read
    fieldset: PIDR4
  - name: PIDR0
    description: Debug MCU CoreSight peripheral identity register 0
    byte_offset: 4064
    access: Read
    fieldset: PIDR0
  - name: PIDR1
    description: Debug MCU CoreSight peripheral identity register 1
    byte_offset: 4068
    access: Read
    fieldset: PIDR1
  - name: PIDR2
    description: Debug MCU CoreSight peripheral identity register 2
    byte_offset: 4072
    access: Read
    fieldset: PIDR2
  - name: PIDR3
    description: Debug MCU CoreSight peripheral identity register 3
    byte_offset: 4076
    access: Read
    fieldset: PIDR3
  - name: CIDR0
    description: Debug MCU CoreSight component identity register 0
    byte_offset: 4080
    access: Read
    fieldset: CIDR0
  - name: CIDR1
    description: Debug MCU CoreSight component identity register 1
    byte_offset: 4084
    access: Read
    fieldset: CIDR1
  - name: CIDR2
    description: Debug MCU CoreSight component identity register 2
    byte_offset: 4088
    access: Read
    fieldset: CIDR2
  - name: CIDR3
    description: Debug MCU CoreSight component identity register 3
    byte_offset: 4092
    access: Read
    fieldset: CIDR3
fieldset/AHB1FZR:
  description: Debug MCU AHB1 peripheral freeze register
  fields:
  - name: DBG_GPDMA0_STOP
    description: GPDMA channel 0 stop in debug
    bit_offset: 0
    bit_size: 1
  - name: DBG_GPDMA1_STOP
    description: GPDMA channel 1 stop in debug
    bit_offset: 1
    bit_size: 1
  - name: DBG_GPDMA2_STOP
    description: GPDMA channel 2 stop in debug
    bit_offset: 2
    bit_size: 1
  - name: DBG_GPDMA3_STOP
    description: GPDMA channel 3 stop in debug
    bit_offset: 3
    bit_size: 1
  - name: DBG_GPDMA4_STOP
    description: GPDMA channel 4 stop in debug
    bit_offset: 4
    bit_size: 1
  - name: DBG_GPDMA5_STOP
    description: GPDMA channel 5 stop in debug
    bit_offset: 5
    bit_size: 1
  - name: DBG_GPDMA6_STOP
    description: GPDMA channel 6 stop in debug
    bit_offset: 6
    bit_size: 1
  - name: DBG_GPDMA7_STOP
    description: GPDMA channel 7 stop in debug
    bit_offset: 7
    bit_size: 1
  - name: DBG_GPDMA8_STOP
    description: GPDMA channel 8 stop in debug
    bit_offset: 8
    bit_size: 1
  - name: DBG_GPDMA9_STOP
    description: GPDMA channel 9 stop in debug
    bit_offset: 9
    bit_size: 1
  - name: DBG_GPDMA10_STOP
    description: GPDMA channel 10 stop in debug
    bit_offset: 10
    bit_size: 1
  - name: DBG_GPDMA11_STOP
    description: GPDMA channel 11 stop in debug
    bit_offset: 11
    bit_size: 1
  - name: DBG_GPDMA12_STOP
    description: GPDMA channel 12 stop in debug
    bit_offset: 12
    bit_size: 1
  - name: DBG_GPDMA13_STOP
    description: GPDMA channel 13 stop in debug
    bit_offset: 13
    bit_size: 1
  - name: DBG_GPDMA14_STOP
    description: GPDMA channel 14 stop in debug
    bit_offset: 14
    bit_size: 1
  - name: DBG_GPDMA15_STOP
    description: GPDMA channel 15 stop in debug
    bit_offset: 15
    bit_size: 1
fieldset/AHB3FZR:
  description: Debug MCU AHB3 peripheral freeze register
  fields:
  - name: DBG_LPDMA0_STOP
    description: LPDMA channel 0 stop in debug
    bit_offset: 0
    bit_size: 1
  - name: DBG_LPDMA1_STOP
    description: LPDMA channel 1 stop in debug
    bit_offset: 1
    bit_size: 1
  - name: DBG_LPDMA2_STOP
    description: LPDMA channel 2 stop in debug
    bit_offset: 2
    bit_size: 1
  - name: DBG_LPDMA3_STOP
    description: LPDMA channel 3 stop in debug
    bit_offset: 3
    bit_size: 1
fieldset/APB1HFZR:
  description: Debug MCU APB1H peripheral freeze register
  fields:
  - name: DBG_I2C4_STOP
    description: I2C4 stop in debug
    bit_offset: 1
    bit_size: 1
  - name: DBG_LPTIM2_STOP
    description: LPTIM2 stop in debug
    bit_offset: 5
    bit_size: 1
fieldset/APB1LFZR:
  description: "Debug MCU APB1L peripheral freeze\r register"
  fields:
  - name: DBG_TIM2_STOP
    description: TIM2 stop in debug
    bit_offset: 0
    bit_size: 1
  - name: DBG_TIM3_STOP
    description: TIM3 stop in debug
    bit_offset: 1
    bit_size: 1
  - name: DBG_TIM4_STOP
    description: TIM4 stop in debug
    bit_offset: 2
    bit_size: 1
  - name: DBG_TIM5_STOP
    description: TIM5 stop in debug
    bit_offset: 3
    bit_size: 1
  - name: DBG_TIM6_STOP
    description: TIM6 stop in debug
    bit_offset: 4
    bit_size: 1
  - name: DBG_TIM7_STOP
    description: TIM7 stop in debug
    bit_offset: 5
    bit_size: 1
  - name: DBG_WWDG_STOP
    description: Window watchdog counter stop in debug
    bit_offset: 11
    bit_size: 1
  - name: DBG_IWDG_STOP
    description: Independent watchdog counter stop in debug
    bit_offset: 12
    bit_size: 1
  - name: DBG_I2C1_STOP
    description: I2C1 SMBUS timeout stop in debug
    bit_offset: 21
    bit_size: 1
  - name: DBG_I2C2_STOP
    description: I2C2 SMBUS timeout stop in debug
    bit_offset: 22
    bit_size: 1
fieldset/APB2FZR:
  description: Debug MCU APB2 peripheral freeze register
  fields:
  - name: DBG_TIM1_STOP
    description: "TIM1 counter stopped when core is\r halted"
    bit_offset: 11
    bit_size: 1
  - name: DBG_TIM8_STOP
    description: TIM8 stop in debug
    bit_offset: 13
    bit_size: 1
  - name: DBG_TIM15_STOP
    description: "TIM15 counter stopped when core is\r halted"
    bit_offset: 16
    bit_size: 1
  - name: DBG_TIM16_STOP
    description: "TIM16 counter stopped when core is\r halted"
    bit_offset: 17
    bit_size: 1
  - name: DBG_TIM17_STOP
    description: DBG_TIM17_STOP
    bit_offset: 18
    bit_size: 1
fieldset/APB3FZR:
  description: Debug MCU APB3 peripheral freeze register
  fields:
  - name: DBG_I2C3_STOP
    description: I2C3 stop in debug
    bit_offset: 10
    bit_size: 1
  - name: DBG_LPTIM1_STOP
    description: LPTIM1 stop in debug
    bit_offset: 17
    bit_size: 1
  - name: DBG_LPTIM3_STOP
    description: LPTIM3 stop in debug
    bit_offset: 18
    bit_size: 1
  - name: DBG_LPTIM4_STOP
    description: LPTIM4 stop in debug
    bit_offset: 19
    bit_size: 1
  - name: DBG_RTC_STOP
    description: RTC stop in debug
    bit_offset: 30
    bit_size: 1
fieldset/CIDR0:
  description: Debug MCU CoreSight component identity register 0
  fields:
  - name: PREAMBLE
    description: component identification bits [7:0]
    bit_offset: 0
    bit_size: 8
fieldset/CIDR1:
  description: Debug MCU CoreSight component identity register 1
  fields:
  - name: PREAMBLE
    description: component identification bits [11:8]
    bit_offset: 0
    bit_size: 4
  - name: CLASS
    description: component identification bits [15:12] - component class
    bit_offset: 4
    bit_size: 4
fieldset/CIDR2:
  description: Debug MCU CoreSight component identity register 2
  fields:
  - name: PREAMBLE
    description: component identification bits [23:16]
    bit_offset: 0
    bit_size: 8
fieldset/CIDR3:
  description: Debug MCU CoreSight component identity register 3
  fields:
  - name: PREAMBLE
    description: component identification bits [31:24]
    bit_offset: 0
    bit_size: 8
fieldset/CR:
  description: "Debug MCU configuration\r register"
  fields:
  - name: DBG_STOP
    description: Debug Stop mode
    bit_offset: 1
    bit_size: 1
  - name: DBG_STANDBY
    description: Debug Standby mode
    bit_offset: 2
    bit_size: 1
  - name: TRACE_IOEN
    description: "Trace pin assignment\r control"
    bit_offset: 4
    bit_size: 1
  - name: TRACE_EN
    description: "trace port and clock\r enable"
    bit_offset: 5
    bit_size: 1
  - name: TRACE_MODE
    description: "Trace pin assignment\r control"
    bit_offset: 6
    bit_size: 2
fieldset/DBGMCU_DBG_AUTH_DEVICE:
  description: DBGMCU debug device authentication register
  fields:
  - name: AUTH_ID
    description: "Device specific ID\r \tDevice specific ID used for RDP regression."
    bit_offset: 0
    bit_size: 32
fieldset/DBGMCU_DBG_AUTH_HOST:
  description: DBGMCU debug host authentication register
  fields:
  - name: AUTH_KEY
    description: "Device authentication key\r \tThe device specific 64-bit authentication key (OEM key) must be written to this register (in two successive 32-bit writes, least significant word first) to permit RDP regression. Writing a wrong key locks access to the device and prevent code execution from the Flash memory."
    bit_offset: 0
    bit_size: 32
fieldset/DBGMCU_SR:
  description: DBGMCU status register
  fields:
  - name: AP_PRESENT
    description: "Bit n identifies whether access port AP n is present in device\r \tBit n = 0: APn absent\r \tBit n = 1: APn present"
    bit_offset: 0
    bit_size: 8
  - name: AP_LOCKED
    description: "DECLARATION TO BE CONFIRMED by PRODUCT OWNER! Bit n identifies whether access port AP n is open (can be accessed via the debug port) or locked (debug access to the AP is blocked)\r \tBit n = 0: APn locked\r \tBit n = 1: APn enabled"
    bit_offset: 8
    bit_size: 8
fieldset/IDCODE:
  description: DBGMCU_IDCODE
  fields:
  - name: DEV_ID
    description: Device dentification
    bit_offset: 0
    bit_size: 12
  - name: REV_ID
    description: Revision
    bit_offset: 16
    bit_size: 16
fieldset/PIDR0:
  description: Debug MCU CoreSight peripheral identity register 0
  fields:
  - name: PARTNUM
    description: part number bits [7:0]
    bit_offset: 0
    bit_size: 8
fieldset/PIDR1:
  description: Debug MCU CoreSight peripheral identity register 1
  fields:
  - name: PARTNUM
    description: part number bits [11:8]
    bit_offset: 0
    bit_size: 4
  - name: JEP106ID
    description: JEP106 identity code bits [3:0]
    bit_offset: 4
    bit_size: 4
fieldset/PIDR2:
  description: Debug MCU CoreSight peripheral identity register 2
  fields:
  - name: JEP106ID
    description: JEP106 identity code bits [6:4]
    bit_offset: 0
    bit_size: 3
  - name: JEDEC
    description: JEDEC assigned value
    bit_offset: 3
    bit_size: 1
  - name: REVISION
    description: component revision number
    bit_offset: 4
    bit_size: 4
fieldset/PIDR3:
  description: Debug MCU CoreSight peripheral identity register 3
  fields:
  - name: CMOD
    description: customer modified
    bit_offset: 0
    bit_size: 4
  - name: REVAND
    description: metal fix version
    bit_offset: 4
    bit_size: 4
fieldset/PIDR4:
  description: Debug MCU CoreSight peripheral identity register 4
  fields:
  - name: JEP106CON
    description: JEP106 continuation code
    bit_offset: 0
    bit_size: 4
  - name: KCOUNT_4
    description: register file size
    bit_offset: 4
    bit_size: 4