452 lines
6.4 KiB
YAML
452 lines
6.4 KiB
YAML
PA0:
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CM4_EVENTOUT: 15
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COMP1_OUT: 12
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SAI1_EXTCLK: 13
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TIM2_CH1: 1
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TIM2_ETR: 14
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PA1:
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CM4_EVENTOUT: 15
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I2C1_SMBA: 4
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LCD_SEG0: 11
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SPI1_SCK: 5
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TIM2_CH2: 1
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PA10:
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CM4_EVENTOUT: 15
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CRS_SYNC: 10
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I2C1_SDA: 4
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LCD_COM2: 11
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SAI1_D1: 3
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SAI1_SD_A: 13
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TIM17_BKIN: 14
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TIM1_CH3: 1
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USART1_RX: 7
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PA11:
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CM4_EVENTOUT: 15
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SPI1_MISO: 5
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TIM1_BKIN2: 12
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TIM1_CH4: 1
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USART1_CTS: 7
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USART1_NSS: 7
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USB_DM: 10
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PA12:
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CM4_EVENTOUT: 15
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LPUART1_RX: 8
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SPI1_MOSI: 5
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TIM1_ETR: 1
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USART1_DE: 7
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USART1_RTS: 7
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USB_DP: 10
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PA13:
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CM4_EVENTOUT: 15
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IR_OUT: 8
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SAI1_SD_B: 13
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SYS_JTMS-SWDIO: 0
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USB_NOE: 10
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PA14:
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CM4_EVENTOUT: 15
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I2C1_SMBA: 4
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LCD_SEG5: 11
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LPTIM1_OUT: 1
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SAI1_FS_B: 13
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SYS_JTCK-SWCLK: 0
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PA15:
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CM4_EVENTOUT: 15
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LCD_SEG17: 11
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RCC_MCO: 6
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SPI1_NSS: 5
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SYS_JTDI: 0
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TIM2_CH1: 1
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TIM2_ETR: 2
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TSC_G3_IO1: 9
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PA2:
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CM4_EVENTOUT: 15
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COMP2_OUT: 12
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LCD_SEG1: 11
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LPUART1_TX: 8
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QUADSPI_BK1_NCS: 10
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RCC_LSCO: 0
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TIM2_CH3: 1
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PA3:
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CM4_EVENTOUT: 15
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LCD_SEG2: 11
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LPUART1_RX: 8
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QUADSPI_CLK: 10
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SAI1_CK1: 3
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SAI1_MCLK_A: 13
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TIM2_CH4: 1
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PA4:
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CM4_EVENTOUT: 15
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LCD_SEG5: 11
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LPTIM2_OUT: 14
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SAI1_FS_B: 13
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SPI1_NSS: 5
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PA5:
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CM4_EVENTOUT: 15
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LPTIM2_ETR: 14
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SAI1_SD_B: 13
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SPI1_SCK: 5
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TIM2_CH1: 1
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TIM2_ETR: 2
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PA6:
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CM4_EVENTOUT: 15
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LCD_SEG3: 11
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LPUART1_CTS: 8
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QUADSPI_BK1_IO3: 10
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SPI1_MISO: 5
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TIM16_CH1: 14
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TIM1_BKIN: 12
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PA7:
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CM4_EVENTOUT: 15
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COMP2_OUT: 12
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I2C3_SCL: 4
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LCD_SEG4: 11
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QUADSPI_BK1_IO2: 10
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SPI1_MOSI: 5
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TIM17_CH1: 14
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TIM1_CH1N: 1
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PA8:
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CM4_EVENTOUT: 15
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LCD_COM0: 11
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LPTIM2_OUT: 14
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RCC_MCO: 0
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SAI1_CK2: 3
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SAI1_SCK_A: 13
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TIM1_CH1: 1
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USART1_CK: 7
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PA9:
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CM4_EVENTOUT: 15
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I2C1_SCL: 4
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LCD_COM1: 11
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SAI1_D2: 3
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SAI1_FS_A: 13
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SPI2_SCK: 5
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TIM1_CH2: 1
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USART1_TX: 7
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PB0:
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CM4_EVENTOUT: 15
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COMP1_OUT: 12
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RF_TX_MOD_EXT_PA: 6
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PB1:
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CM4_EVENTOUT: 15
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LPTIM2_IN1: 14
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LPUART1_DE: 8
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LPUART1_RTS: 8
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PB10:
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CM4_EVENTOUT: 15
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COMP1_OUT: 12
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I2C3_SCL: 4
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LCD_SEG10: 11
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LPUART1_RX: 8
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QUADSPI_CLK: 10
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SAI1_SCK_A: 13
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SPI2_SCK: 5
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TIM2_CH3: 1
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TSC_SYNC: 9
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PB11:
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CM4_EVENTOUT: 15
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COMP2_OUT: 12
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I2C3_SDA: 4
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LCD_SEG11: 11
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LPUART1_TX: 8
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QUADSPI_BK1_NCS: 10
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TIM2_CH4: 1
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PB12:
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CM4_EVENTOUT: 15
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I2C3_SMBA: 4
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LCD_SEG12: 11
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LPUART1_DE: 8
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LPUART1_RTS: 8
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SAI1_FS_A: 13
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SPI2_NSS: 5
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TIM1_BKIN: 3
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TSC_G1_IO1: 9
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PB13:
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CM4_EVENTOUT: 15
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I2C3_SCL: 4
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LCD_SEG13: 11
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LPUART1_CTS: 8
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SAI1_SCK_A: 13
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SPI2_SCK: 5
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TIM1_CH1N: 1
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TSC_G1_IO2: 9
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PB14:
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CM4_EVENTOUT: 15
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I2C3_SDA: 4
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LCD_SEG14: 11
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SAI1_MCLK_A: 13
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SPI2_MISO: 5
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TIM1_CH2N: 1
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TSC_G1_IO3: 9
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PB15:
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CM4_EVENTOUT: 15
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LCD_SEG15: 11
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RTC_REFIN: 0
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SAI1_SD_A: 13
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SPI2_MOSI: 5
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TIM1_CH3N: 1
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TSC_G1_IO4: 9
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PB2:
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CM4_EVENTOUT: 15
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I2C3_SMBA: 4
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LCD_VLCD: 11
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LPTIM1_OUT: 1
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SAI1_EXTCLK: 13
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SPI1_NSS: 5
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PB3:
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CM4_EVENTOUT: 15
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LCD_SEG7: 11
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SAI1_SCK_B: 13
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SPI1_SCK: 5
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SYS_JTDO-SWO: 0
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TIM2_CH2: 1
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USART1_DE: 7
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USART1_RTS: 7
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PB4:
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CM4_EVENTOUT: 15
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I2C3_SDA: 4
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LCD_SEG8: 11
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SAI1_MCLK_B: 13
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SPI1_MISO: 5
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SYS_JTRST: 0
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TIM17_BKIN: 14
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TSC_G2_IO1: 9
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USART1_CTS: 7
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USART1_NSS: 7
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PB5:
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CM4_EVENTOUT: 15
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COMP2_OUT: 12
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I2C1_SMBA: 4
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LCD_SEG9: 11
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LPTIM1_IN1: 1
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LPUART1_TX: 8
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SAI1_SD_B: 13
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SPI1_MOSI: 5
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TIM16_BKIN: 14
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TSC_G2_IO2: 9
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USART1_CK: 7
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PB6:
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CM4_EVENTOUT: 15
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I2C1_SCL: 4
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LCD_SEG6: 11
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LPTIM1_ETR: 1
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RCC_MCO: 0
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SAI1_FS_B: 13
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TIM16_CH1N: 14
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TSC_G2_IO3: 9
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USART1_TX: 7
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PB7:
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CM4_EVENTOUT: 15
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I2C1_SDA: 4
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LCD_SEG21: 11
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LPTIM1_IN2: 1
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TIM17_CH1N: 14
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TIM1_BKIN: 3
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TSC_G2_IO4: 9
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USART1_RX: 7
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PB8:
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CM4_EVENTOUT: 15
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I2C1_SCL: 4
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LCD_SEG16: 11
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QUADSPI_BK1_IO1: 10
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SAI1_CK1: 3
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SAI1_MCLK_A: 13
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TIM16_CH1: 14
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TIM1_CH2N: 1
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PB9:
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CM4_EVENTOUT: 15
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I2C1_SDA: 4
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IR_OUT: 8
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LCD_COM3: 11
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QUADSPI_BK1_IO0: 10
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SAI1_D2: 3
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SAI1_FS_A: 13
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SPI2_NSS: 5
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TIM17_CH1: 14
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TIM1_CH3N: 1
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TSC_G7_IO4: 9
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PC0:
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CM4_EVENTOUT: 15
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I2C3_SCL: 4
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LCD_SEG18: 11
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LPTIM1_IN1: 1
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LPTIM2_IN1: 14
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LPUART1_RX: 8
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PC1:
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CM4_EVENTOUT: 15
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I2C3_SDA: 4
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LCD_SEG19: 11
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LPTIM1_OUT: 1
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LPUART1_TX: 8
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SPI2_MOSI: 3
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PC10:
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CM4_EVENTOUT: 15
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LCD_COM4: 11
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LCD_SEG28: 11
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LCD_SEG40: 11
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SYS_TRACED1: 0
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TSC_G3_IO2: 9
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PC11:
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CM4_EVENTOUT: 15
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LCD_COM5: 11
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LCD_SEG29: 11
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LCD_SEG41: 11
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TSC_G3_IO3: 9
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PC12:
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CM4_EVENTOUT: 15
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LCD_COM6: 11
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LCD_SEG30: 11
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LCD_SEG42: 11
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RCC_LSCO: 6
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SYS_TRACED3: 0
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TSC_G3_IO4: 9
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PC13:
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CM4_EVENTOUT: 15
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PC14:
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CM4_EVENTOUT: 15
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PC15:
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CM4_EVENTOUT: 15
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PC2:
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CM4_EVENTOUT: 15
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LCD_SEG20: 11
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LPTIM1_IN2: 1
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SPI2_MISO: 5
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PC3:
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CM4_EVENTOUT: 15
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LCD_VLCD: 11
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LPTIM1_ETR: 1
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LPTIM2_ETR: 14
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SAI1_D1: 3
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SAI1_SD_A: 13
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SPI2_MOSI: 5
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PC4:
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CM4_EVENTOUT: 15
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LCD_SEG22: 11
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PC5:
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CM4_EVENTOUT: 15
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LCD_SEG23: 11
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SAI1_D3: 3
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PC6:
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CM4_EVENTOUT: 15
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LCD_SEG24: 11
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TSC_G4_IO1: 9
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PC7:
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CM4_EVENTOUT: 15
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LCD_SEG25: 11
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TSC_G4_IO2: 9
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PC8:
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CM4_EVENTOUT: 15
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LCD_SEG26: 11
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TSC_G4_IO3: 9
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PC9:
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CM4_EVENTOUT: 15
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LCD_SEG27: 11
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SAI1_SCK_B: 13
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TIM1_BKIN: 3
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TSC_G4_IO4: 9
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USB_NOE: 10
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PD0:
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CM4_EVENTOUT: 15
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SPI2_NSS: 5
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PD1:
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CM4_EVENTOUT: 15
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SPI2_SCK: 5
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PD10:
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CM4_EVENTOUT: 15
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LCD_SEG30: 11
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TRIG_INOUT: 0
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TSC_G6_IO1: 9
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PD11:
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CM4_EVENTOUT: 15
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LCD_SEG31: 11
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LPTIM2_ETR: 14
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TSC_G6_IO2: 9
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PD12:
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CM4_EVENTOUT: 15
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LCD_SEG32: 11
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LPTIM2_IN1: 14
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TSC_G6_IO3: 9
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PD13:
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CM4_EVENTOUT: 15
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LCD_SEG33: 11
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LPTIM2_OUT: 14
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TSC_G6_IO4: 9
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PD14:
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CM4_EVENTOUT: 15
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LCD_SEG34: 11
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TIM1_CH1: 1
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PD15:
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CM4_EVENTOUT: 15
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LCD_SEG35: 11
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TIM1_CH2: 1
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PD2:
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CM4_EVENTOUT: 15
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LCD_COM7: 11
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LCD_SEG31: 11
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LCD_SEG43: 11
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SYS_TRACED2: 0
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TSC_SYNC: 9
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PD3:
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CM4_EVENTOUT: 15
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QUADSPI_BK1_NCS: 10
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SPI2_MISO: 5
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SPI2_SCK: 3
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PD4:
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CM4_EVENTOUT: 15
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QUADSPI_BK1_IO0: 10
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SPI2_MOSI: 5
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TSC_G5_IO1: 9
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PD5:
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CM4_EVENTOUT: 15
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QUADSPI_BK1_IO1: 10
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SAI1_MCLK_B: 13
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TSC_G5_IO2: 9
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PD6:
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CM4_EVENTOUT: 15
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QUADSPI_BK1_IO2: 10
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SAI1_D1: 3
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SAI1_SD_A: 13
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TSC_G5_IO3: 9
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PD7:
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CM4_EVENTOUT: 15
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LCD_SEG39: 11
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QUADSPI_BK1_IO3: 10
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TSC_G5_IO4: 9
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PD8:
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CM4_EVENTOUT: 15
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LCD_SEG28: 11
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TIM1_BKIN2: 2
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PD9:
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CM4_EVENTOUT: 15
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LCD_SEG29: 11
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SYS_TRACED0: 0
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PE0:
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CM4_EVENTOUT: 15
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LCD_SEG36: 11
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TIM16_CH1: 14
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TIM1_ETR: 1
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TSC_G7_IO3: 9
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PE1:
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CM4_EVENTOUT: 15
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LCD_SEG37: 11
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TIM17_CH1: 14
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TSC_G7_IO2: 9
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PE2:
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CM4_EVENTOUT: 15
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LCD_SEG38: 11
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SAI1_CK1: 3
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SAI1_MCLK_A: 13
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SYS_TRACECLK: 0
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TSC_G7_IO1: 9
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PE3:
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CM4_EVENTOUT: 15
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PE4:
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CM4_EVENTOUT: 15
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PH0:
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CM4_EVENTOUT: 15
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PH1:
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CM4_EVENTOUT: 15
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PH3:
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CM4_EVENTOUT: 15
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RCC_LSCO: 0
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PI8: {}
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