stm32-data/data/registers/hsem_v5.yaml
2024-04-08 13:36:40 +02:00

247 lines
6.0 KiB
YAML

block/HSEM:
description: HSEM.
items:
- name: R
description: Semaphore %s register.
array:
len: 32
stride: 4
byte_offset: 0
fieldset: R
- name: RLR
description: Semaphore %s read lock register.
array:
len: 32
stride: 4
byte_offset: 128
access: Read
fieldset: RLR
- name: C1IER
description: HSEM Interrupt enable register.
byte_offset: 256
fieldset: C1IER
- name: C1ICR
description: HSEM Interrupt clear register.
byte_offset: 260
fieldset: C1ICR
- name: C1ISR
description: HSEM Interrupt status register.
byte_offset: 264
access: Read
fieldset: C1ISR
- name: C1MISR
description: HSEM Masked interrupt status register.
byte_offset: 268
access: Read
fieldset: C1MISR
- name: C2IER
description: HSEM Interrupt enable register.
byte_offset: 272
fieldset: C2IER
- name: C2ICR
description: HSEM Interrupt clear register.
byte_offset: 276
fieldset: C2ICR
- name: C2ISR
description: HSEM Interrupt status register.
byte_offset: 280
access: Read
fieldset: C2ISR
- name: C2MISR
description: HSEM Masked interrupt status register.
byte_offset: 284
access: Read
fieldset: C2MISR
- name: CR
description: Semaphore Clear register.
byte_offset: 320
fieldset: CR
- name: KEYR
description: Interrupt clear register.
byte_offset: 324
fieldset: KEYR
- name: HWCFGR2
description: Semaphore hardware configuration register 2.
byte_offset: 1004
access: Read
fieldset: HWCFGR2
- name: HWCFGR1
description: Semaphore hardware configuration register 1.
byte_offset: 1008
access: Read
fieldset: HWCFGR1
- name: VERR
description: HSEM version register.
byte_offset: 1012
access: Read
fieldset: VERR
- name: IPIDR
description: HSEM indentification register.
byte_offset: 1016
access: Read
fieldset: IPIDR
- name: SIDR
description: HSEM size indentification register.
byte_offset: 1020
access: Read
fieldset: SIDR
fieldset/C1ICR:
description: HSEM Interrupt clear register.
fields:
- name: ISCm
description: CPU(n) semaphore m clear bit.
bit_offset: 0
bit_size: 32
fieldset/C1IER:
description: HSEM Interrupt enable register.
fields:
- name: ISEm
description: CPU(n) semaphore m enable bit.
bit_offset: 0
bit_size: 32
fieldset/C1ISR:
description: HSEM Interrupt status register.
fields:
- name: ISFm
description: CPU(n) semaphore m status bit before enable (mask).
bit_offset: 0
bit_size: 32
fieldset/C1MISR:
description: HSEM Masked interrupt status register.
fields:
- name: MISFm
description: masked CPU(n) semaphore m status bit after enable (mask).
bit_offset: 0
bit_size: 32
fieldset/C2ICR:
description: HSEM Interrupt clear register.
fields:
- name: ISCm
description: CPU(2) semaphore m clear bit.
bit_offset: 0
bit_size: 32
fieldset/C2IER:
description: HSEM Interrupt enable register.
fields:
- name: ISEm
description: CPU(2) semaphore m enable bit.
bit_offset: 0
bit_size: 32
fieldset/C2ISR:
description: HSEM Interrupt status register.
fields:
- name: ISFm
description: CPU(2) semaphore m status bit before enable (mask).
bit_offset: 0
bit_size: 32
fieldset/C2MISR:
description: HSEM Masked interrupt status register.
fields:
- name: MISFm
description: masked CPU(2) semaphore m status bit after enable (mask).
bit_offset: 0
bit_size: 32
fieldset/CR:
description: Semaphore Clear register.
fields:
- name: COREID
description: CoreID of semaphore to be cleared.
bit_offset: 8
bit_size: 4
- name: KEY
description: Semaphore clear Key.
bit_offset: 16
bit_size: 16
fieldset/HWCFGR1:
description: Semaphore hardware configuration register 1.
fields:
- name: NBSEM
description: Hardware Configuration number of semaphores.
bit_offset: 0
bit_size: 8
- name: NBINT
description: Hardware Configuration number of interrupts supported number of master IDs.
bit_offset: 8
bit_size: 4
fieldset/HWCFGR2:
description: Semaphore hardware configuration register 2.
fields:
- name: MASTERID1
description: Hardware Configuration valid bus masters ID1.
bit_offset: 0
bit_size: 4
- name: MASTERID2
description: Hardware Configuration valid bus masters ID2.
bit_offset: 4
bit_size: 4
- name: MASTERID3
description: Hardware Configuration valid bus masters ID3.
bit_offset: 8
bit_size: 4
- name: MASTERID4
description: Hardware Configuration valid bus masters ID4.
bit_offset: 12
bit_size: 4
fieldset/IPIDR:
description: HSEM indentification register.
fields:
- name: ID
description: Identification Code.
bit_offset: 0
bit_size: 32
fieldset/KEYR:
description: Interrupt clear register.
fields:
- name: KEY
description: Semaphore Clear Key.
bit_offset: 16
bit_size: 16
fieldset/R:
description: Semaphore %s register.
fields:
- name: PROCID
description: Semaphore ProcessID.
bit_offset: 0
bit_size: 8
- name: COREID
description: Semaphore CoreID.
bit_offset: 8
bit_size: 4
- name: LOCK
description: lock indication.
bit_offset: 31
bit_size: 1
fieldset/RLR:
description: Semaphore %s read lock register.
fields:
- name: PROCID
description: Semaphore ProcessID.
bit_offset: 0
bit_size: 8
- name: COREID
description: Semaphore CoreID.
bit_offset: 8
bit_size: 4
- name: LOCK
description: lock indication.
bit_offset: 31
bit_size: 1
fieldset/SIDR:
description: HSEM size indentification register.
fields:
- name: SID
description: Size Identification Code.
bit_offset: 0
bit_size: 32
fieldset/VERR:
description: HSEM version register.
fields:
- name: MINREV
description: Minor Revision.
bit_offset: 0
bit_size: 4
- name: MAJREV
description: Major Revision.
bit_offset: 4
bit_size: 4