243 lines
5.7 KiB
YAML
243 lines
5.7 KiB
YAML
---
|
|
block/FLASH:
|
|
description: Flash
|
|
items:
|
|
- name: ACR
|
|
description: Access control register
|
|
byte_offset: 0
|
|
fieldset: ACR
|
|
- name: PECR
|
|
description: Program/erase control register
|
|
byte_offset: 4
|
|
fieldset: PECR
|
|
- name: PDKEYR
|
|
description: Power down key register
|
|
byte_offset: 8
|
|
access: Write
|
|
fieldset: PDKEYR
|
|
- name: PEKEYR
|
|
description: Program/erase key register
|
|
byte_offset: 12
|
|
access: Write
|
|
fieldset: PEKEYR
|
|
- name: PRGKEYR
|
|
description: Program memory key register
|
|
byte_offset: 16
|
|
access: Write
|
|
fieldset: PRGKEYR
|
|
- name: OPTKEYR
|
|
description: Option byte key register
|
|
byte_offset: 20
|
|
access: Write
|
|
fieldset: OPTKEYR
|
|
- name: SR
|
|
description: Status register
|
|
byte_offset: 24
|
|
fieldset: SR
|
|
- name: OBR
|
|
description: Option byte register
|
|
byte_offset: 28
|
|
access: Read
|
|
fieldset: OBR
|
|
- name: WRPR1
|
|
description: Write protection register
|
|
byte_offset: 32
|
|
fieldset: WRPR1
|
|
- name: WRPR2
|
|
description: Write protection register
|
|
byte_offset: 128
|
|
fieldset: WRPR2
|
|
- name: WRPR3
|
|
description: Write protection register
|
|
byte_offset: 132
|
|
fieldset: WRPR3
|
|
fieldset/ACR:
|
|
description: Access control register
|
|
fields:
|
|
- name: LATENCY
|
|
description: Latency
|
|
bit_offset: 0
|
|
bit_size: 1
|
|
- name: PRFTEN
|
|
description: Prefetch enable
|
|
bit_offset: 1
|
|
bit_size: 1
|
|
- name: ACC64
|
|
description: 64-bit access
|
|
bit_offset: 2
|
|
bit_size: 1
|
|
- name: SLEEP_PD
|
|
description: Flash mode during Sleep
|
|
bit_offset: 3
|
|
bit_size: 1
|
|
- name: RUN_PD
|
|
description: Flash mode during Run
|
|
bit_offset: 4
|
|
bit_size: 1
|
|
fieldset/OBR:
|
|
description: Option byte register
|
|
fields:
|
|
- name: RDPRT
|
|
description: Read protection
|
|
bit_offset: 0
|
|
bit_size: 8
|
|
- name: BOR_LEV
|
|
description: BOR_LEV
|
|
bit_offset: 16
|
|
bit_size: 4
|
|
- name: IWDG_SW
|
|
description: IWDG_SW
|
|
bit_offset: 20
|
|
bit_size: 1
|
|
- name: nRTS_STOP
|
|
description: nRTS_STOP
|
|
bit_offset: 21
|
|
bit_size: 1
|
|
- name: nRST_STDBY
|
|
description: nRST_STDBY
|
|
bit_offset: 22
|
|
bit_size: 1
|
|
- name: BFB2
|
|
description: Boot From Bank 2
|
|
bit_offset: 23
|
|
bit_size: 1
|
|
fieldset/OPTKEYR:
|
|
description: Option byte key register
|
|
fields:
|
|
- name: OPTKEYR
|
|
description: Option byte key
|
|
bit_offset: 0
|
|
bit_size: 32
|
|
fieldset/PDKEYR:
|
|
description: Power down key register
|
|
fields:
|
|
- name: PDKEYR
|
|
description: RUN_PD in FLASH_ACR key
|
|
bit_offset: 0
|
|
bit_size: 32
|
|
fieldset/PECR:
|
|
description: Program/erase control register
|
|
fields:
|
|
- name: PELOCK
|
|
description: FLASH_PECR and data EEPROM lock
|
|
bit_offset: 0
|
|
bit_size: 1
|
|
- name: PRGLOCK
|
|
description: Program memory lock
|
|
bit_offset: 1
|
|
bit_size: 1
|
|
- name: OPTLOCK
|
|
description: Option bytes block lock
|
|
bit_offset: 2
|
|
bit_size: 1
|
|
- name: PROG
|
|
description: Program memory selection
|
|
bit_offset: 3
|
|
bit_size: 1
|
|
- name: DATA
|
|
description: Data EEPROM selection
|
|
bit_offset: 4
|
|
bit_size: 1
|
|
- name: FTDW
|
|
description: "Fixed time data write for Byte, Half Word and Word programming"
|
|
bit_offset: 8
|
|
bit_size: 1
|
|
- name: ERASE
|
|
description: Page or Double Word erase mode
|
|
bit_offset: 9
|
|
bit_size: 1
|
|
- name: FPRG
|
|
description: Half Page/Double Word programming mode
|
|
bit_offset: 10
|
|
bit_size: 1
|
|
- name: PARALLELBANK
|
|
description: Parallel bank mode
|
|
bit_offset: 15
|
|
bit_size: 1
|
|
- name: EOPIE
|
|
description: End of programming interrupt enable
|
|
bit_offset: 16
|
|
bit_size: 1
|
|
- name: ERRIE
|
|
description: Error interrupt enable
|
|
bit_offset: 17
|
|
bit_size: 1
|
|
- name: OBL_LAUNCH
|
|
description: Launch the option byte loading
|
|
bit_offset: 18
|
|
bit_size: 1
|
|
fieldset/PEKEYR:
|
|
description: Program/erase key register
|
|
fields:
|
|
- name: PEKEYR
|
|
description: FLASH_PEC and data EEPROM key
|
|
bit_offset: 0
|
|
bit_size: 32
|
|
fieldset/PRGKEYR:
|
|
description: Program memory key register
|
|
fields:
|
|
- name: PRGKEYR
|
|
description: Program memory key
|
|
bit_offset: 0
|
|
bit_size: 32
|
|
fieldset/SR:
|
|
description: Status register
|
|
fields:
|
|
- name: BSY
|
|
description: Write/erase operations in progress
|
|
bit_offset: 0
|
|
bit_size: 1
|
|
- name: EOP
|
|
description: End of operation
|
|
bit_offset: 1
|
|
bit_size: 1
|
|
- name: ENDHV
|
|
description: End of high voltage
|
|
bit_offset: 2
|
|
bit_size: 1
|
|
- name: READY
|
|
description: Flash memory module ready after low power mode
|
|
bit_offset: 3
|
|
bit_size: 1
|
|
- name: WRPERR
|
|
description: Write protected error
|
|
bit_offset: 8
|
|
bit_size: 1
|
|
- name: PGAERR
|
|
description: Programming alignment error
|
|
bit_offset: 9
|
|
bit_size: 1
|
|
- name: SIZERR
|
|
description: Size error
|
|
bit_offset: 10
|
|
bit_size: 1
|
|
- name: OPTVERR
|
|
description: Option validity error
|
|
bit_offset: 11
|
|
bit_size: 1
|
|
- name: OPTVERRUSR
|
|
description: Option UserValidity Error
|
|
bit_offset: 12
|
|
bit_size: 1
|
|
fieldset/WRPR1:
|
|
description: Write protection register
|
|
fields:
|
|
- name: WRP1
|
|
description: Write protection
|
|
bit_offset: 0
|
|
bit_size: 32
|
|
fieldset/WRPR2:
|
|
description: Write protection register
|
|
fields:
|
|
- name: WRP2
|
|
description: WRP2
|
|
bit_offset: 0
|
|
bit_size: 32
|
|
fieldset/WRPR3:
|
|
description: Write protection register
|
|
fields:
|
|
- name: WRP3
|
|
description: WRP3
|
|
bit_offset: 0
|
|
bit_size: 32
|