stm32-data/data/gpio_af/STM32F052.yaml
Dario Nieuwenhuis 69b1c6a96c Add the thing
2021-04-15 04:42:04 +02:00

372 lines
4.6 KiB
YAML

PA0:
COMP1_OUT: 7
TIM2_CH1: 2
TIM2_ETR: 2
TSC_G1_IO1: 3
USART2_CTS: 1
USART4_TX: 4
PA1:
EVENTOUT: 0
TIM15_CH1N: 5
TIM2_CH2: 2
TSC_G1_IO2: 3
USART2_DE: 1
USART2_RTS: 1
USART4_RX: 4
PA10:
TIM17_BKIN: 0
TIM1_CH3: 2
TSC_G4_IO2: 3
USART1_RX: 1
PA11:
CAN_RX: 4
COMP1_OUT: 7
EVENTOUT: 0
TIM1_CH4: 2
TSC_G4_IO3: 3
USART1_CTS: 1
PA12:
CAN_TX: 4
COMP2_OUT: 7
EVENTOUT: 0
TIM1_ETR: 2
TSC_G4_IO4: 3
USART1_DE: 1
USART1_RTS: 1
PA13:
IR_OUT: 1
SYS_SWDIO: 0
USB_NOE: 2
PA14:
SYS_SWCLK: 0
USART2_TX: 1
PA15:
EVENTOUT: 3
I2S1_WS: 0
SPI1_NSS: 0
TIM2_CH1: 2
TIM2_ETR: 2
USART2_RX: 1
USART4_DE: 4
USART4_RTS: 4
PA2:
COMP2_OUT: 7
TIM15_CH1: 0
TIM2_CH3: 2
TSC_G1_IO3: 3
USART2_TX: 1
PA3:
TIM15_CH2: 0
TIM2_CH4: 2
TSC_G1_IO4: 3
USART2_RX: 1
PA4:
I2S1_WS: 0
SPI1_NSS: 0
TIM14_CH1: 4
TSC_G2_IO1: 3
USART2_CK: 1
PA5:
CEC: 1
I2S1_CK: 0
SPI1_SCK: 0
TIM2_CH1: 2
TIM2_ETR: 2
TSC_G2_IO2: 3
PA6:
COMP1_OUT: 7
EVENTOUT: 6
I2S1_MCK: 0
SPI1_MISO: 0
TIM16_CH1: 5
TIM1_BKIN: 2
TIM3_CH1: 1
TSC_G2_IO3: 3
USART3_CTS: 4
PA7:
COMP2_OUT: 7
EVENTOUT: 6
I2S1_SD: 0
SPI1_MOSI: 0
TIM14_CH1: 4
TIM17_CH1: 5
TIM1_CH1N: 2
TIM3_CH2: 1
TSC_G2_IO4: 3
PA8:
CRS_SYNC: 4
EVENTOUT: 3
RCC_MCO: 0
TIM1_CH1: 2
USART1_CK: 1
PA9:
TIM15_BKIN: 0
TIM1_CH2: 2
TSC_G4_IO1: 3
USART1_TX: 1
PB0:
EVENTOUT: 0
TIM1_CH2N: 2
TIM3_CH3: 1
TSC_G3_IO2: 3
USART3_CK: 4
PB1:
TIM14_CH1: 0
TIM1_CH3N: 2
TIM3_CH4: 1
TSC_G3_IO3: 3
USART3_DE: 4
USART3_RTS: 4
PB10:
CEC: 0
I2C2_SCL: 1
I2S2_CK: 5
SPI2_SCK: 5
TIM2_CH3: 2
TSC_SYNC: 3
USART3_TX: 4
PB11:
EVENTOUT: 0
I2C2_SDA: 1
TIM2_CH4: 2
TSC_G6_IO1: 3
USART3_RX: 4
PB12:
EVENTOUT: 1
I2S2_WS: 0
SPI2_NSS: 0
TIM15_BKIN: 5
TIM1_BKIN: 2
TSC_G6_IO2: 3
USART3_CK: 4
PB13:
I2C2_SCL: 5
I2S2_CK: 0
SPI2_SCK: 0
TIM1_CH1N: 2
TSC_G6_IO3: 3
USART3_CTS: 4
PB14:
I2C2_SDA: 5
I2S2_MCK: 0
SPI2_MISO: 0
TIM15_CH1: 1
TIM1_CH2N: 2
TSC_G6_IO4: 3
USART3_DE: 4
USART3_RTS: 4
PB15:
I2S2_SD: 0
SPI2_MOSI: 0
TIM15_CH1N: 3
TIM15_CH2: 1
TIM1_CH3N: 2
PB2:
TSC_G3_IO4: 3
PB3:
EVENTOUT: 1
I2S1_CK: 0
SPI1_SCK: 0
TIM2_CH2: 2
TSC_G5_IO1: 3
PB4:
EVENTOUT: 2
I2S1_MCK: 0
SPI1_MISO: 0
TIM17_BKIN: 5
TIM3_CH1: 1
TSC_G5_IO2: 3
PB5:
I2C1_SMBA: 3
I2S1_SD: 0
SPI1_MOSI: 0
TIM16_BKIN: 2
TIM3_CH2: 1
PB6:
I2C1_SCL: 1
TIM16_CH1N: 2
TSC_G5_IO3: 3
USART1_TX: 0
PB7:
I2C1_SDA: 1
TIM17_CH1N: 2
TSC_G5_IO4: 3
USART1_RX: 0
USART4_CTS: 4
PB8:
CAN_RX: 4
CEC: 0
I2C1_SCL: 1
TIM16_CH1: 2
TSC_SYNC: 3
PB9:
CAN_TX: 4
EVENTOUT: 3
I2C1_SDA: 1
I2S2_WS: 5
IR_OUT: 0
SPI2_NSS: 5
TIM17_CH1: 2
PC0:
EVENTOUT: 0
SYS_I2C: 7
PC1:
EVENTOUT: 0
SYS_SPI: 7
PC10:
SYS_TIM15: 7
USART3_TX: 1
USART4_TX: 0
PC11:
SYS_TIM16: 7
USART3_RX: 1
USART4_RX: 0
PC12:
SYS_TIM17: 7
USART3_CK: 1
USART4_CK: 0
PC13:
CEC: 7
SYS_IR-Out: 7
PC14:
SYS_COMP: 7
SYS_DAC: 7
PC15:
SYS_CAN: 7
PC2:
EVENTOUT: 0
I2S2_MCK: 1
SPI2_MISO: 1
SYS_USART: 7
PC3:
EVENTOUT: 0
I2S2_SD: 1
SPI2_MOSI: 1
SYS_SYSTEM: 7
PC4:
EVENTOUT: 0
USART3_TX: 1
PC5:
SYS_TOUCH: 7
TSC_G3_IO1: 0
USART3_RX: 1
PC6:
SYS_TIM1: 7
TIM3_CH1: 0
PC7:
SYS_TIM2: 7
TIM3_CH2: 0
PC8:
SYS_TIM3: 7
TIM3_CH3: 0
PC9:
SYS_TIM14: 7
TIM3_CH4: 0
PD0:
CAN_RX: 0
I2S2_WS: 1
SPI2_NSS: 1
PD1:
CAN_TX: 0
I2S2_CK: 1
SPI2_SCK: 1
PD10:
USART3_CK: 0
PD11:
USART3_CTS: 0
PD12:
TSC_G8_IO1: 1
USART3_DE: 0
USART3_RTS: 0
PD13:
TSC_G8_IO2: 1
PD14:
TSC_G8_IO3: 1
PD15:
CRS_SYNC: 0
TSC_G8_IO4: 1
PD2:
TIM3_ETR: 0
USART3_DE: 1
USART3_RTS: 1
PD3:
I2S2_MCK: 1
SPI2_MISO: 1
SYS_- new pin (not existing on Stingray 64K): 4
USART2_CTS: 0
PD4:
I2S2_SD: 1
SPI2_MOSI: 1
SYS_- new functionality (not forecasted in Stingray 64K pinout file): 4
USART2_DE: 0
USART2_RTS: 0
PD5:
USART2_TX: 0
PD6:
USART2_RX: 0
PD7:
USART2_CK: 0
PD8:
SYS_- functionality on new pin (forecasted in Stingray 64K pinout file): 4
USART3_TX: 0
PD9:
USART3_RX: 0
PE0:
EVENTOUT: 1
TIM16_CH1: 0
PE1:
EVENTOUT: 1
TIM17_CH1: 0
PE10:
TIM1_CH2N: 0
PE11:
TIM1_CH2: 0
PE12:
I2S1_WS: 1
SPI1_NSS: 1
TIM1_CH3N: 0
PE13:
I2S1_CK: 1
SPI1_SCK: 1
TIM1_CH3: 0
PE14:
I2S1_MCK: 1
SPI1_MISO: 1
TIM1_CH4: 0
PE15:
I2S1_SD: 1
SPI1_MOSI: 1
TIM1_BKIN: 0
PE2:
TIM3_ETR: 0
TSC_G7_IO1: 1
PE3:
TIM3_CH1: 0
TSC_G7_IO2: 1
PE4:
TIM3_CH2: 0
TSC_G7_IO3: 1
PE5:
TIM3_CH3: 0
TSC_G7_IO4: 1
PE6:
TIM3_CH4: 0
PE7:
TIM1_ETR: 0
PE8:
TIM1_CH1N: 0
PE9:
TIM1_CH1: 0
PF0:
CRS_SYNC: 0
PF1: {}
PF10:
TIM15_CH2: 0
PF2:
EVENTOUT: 0
PF3:
EVENTOUT: 0
PF6: {}
PF9:
TIM15_CH1: 0