Michael Zill b782384611 Arrayfied IER, ICR, ISR and MISR ...

IRQ registers have for all 4 variants the same name.
V1 - array size = 2 (2 cores)
V2 - array size = 1 (1 core)
V3 - array size = 2 (2 cores)
V4 - array size = 1 (1 core)

HSEM added to GHOST_PERIS

2024-04-08 13:38:36 +02:00

..

src

Arrayfied IER, ICR, ISR and MISR

2024-04-08 13:38:36 +02:00

Cargo.toml

make address of registers show as hex

2024-02-25 22:24:22 +01:00